Searched refs:Q18 (Results 1 – 13 of 13) sorted by relevance
| /external/libxaac/decoder/ |
| D | ixheaacd_constants.h | 41 #define Q18 262144 macro
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 138 case AArch64::Q18: in isOdd()
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| D | AArch64RegisterInfo.td | 392 def Q18 : AArch64Reg<18, "q18", [D18], ["v18", ""]>, DwarfRegAlias<B18>;
751 def Z18 : AArch64Reg<18, "z18", [Q18, Z18_HI]>, DwarfRegNum<[114]>;
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 138 case AArch64::Q18: in isOdd()
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| D | AArch64RegisterInfo.td | 373 def Q18 : AArch64Reg<18, "q18", [D18], ["v18", ""]>, DwarfRegAlias<B18>;
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1245 case AArch64::Q17: Reg = AArch64::Q18; break; in getNextVectorRegister()
1246 case AArch64::Q18: Reg = AArch64::Q19; break; in getNextVectorRegister()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1133 case AArch64::Q17: Reg = AArch64::Q18; break; in getNextVectorRegister()
1134 case AArch64::Q18: Reg = AArch64::Q19; break; in getNextVectorRegister()
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 259 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
439 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 300 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
624 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 159 Q18 = 139,
2593 …h64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArc…
3838 { AArch64::Q18, 82U },
4117 { AArch64::Q18, 82U },
19336 …h64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArc…
19338 …h64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArc…
19356 …h64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArc…
19358 …h64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArc…
19360 …h64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArc…
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| D | AArch64GenAsmMatcher.inc | 10851 case AArch64::Q18: OpKind = MCK_FPR128; break;
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1875 .Case("v18", AArch64::Q18) in matchVectorRegName()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 2070 .Case("v18", AArch64::Q18) in MatchNeonVectorRegName()
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