Searched refs:RBGPR (Results 1 – 4 of 4) sorted by relevance
145 const RegisterBank &RBGPR = getRegBank(ARM::GPRRegBankID); in ARMRegisterBankInfo() local146 (void)RBGPR; in ARMRegisterBankInfo()147 assert(&ARM::GPRRegBank == &RBGPR && "The order in RegBanks is messed up"); in ARMRegisterBankInfo()150 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRRegClassID)) && in ARMRegisterBankInfo()152 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRwithAPSRRegClassID)) && in ARMRegisterBankInfo()154 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRnopcRegClassID)) && in ARMRegisterBankInfo()156 assert(RBGPR.covers(*TRI.getRegClass(ARM::rGPRRegClassID)) && in ARMRegisterBankInfo()158 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPRRegClassID)) && in ARMRegisterBankInfo()160 assert(RBGPR.covers(*TRI.getRegClass(ARM::tcGPRRegClassID)) && in ARMRegisterBankInfo()162 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPR_and_tcGPRRegClassID)) && in ARMRegisterBankInfo()[all …]
35 const RegisterBank &RBGPR = getRegBank(AArch64::GPRRegBankID); in AArch64RegisterBankInfo() local36 (void)RBGPR; in AArch64RegisterBankInfo()37 assert(RBGPR.covers(*TRI.getRegClass(AArch64::GPR32RegClassID)) && in AArch64RegisterBankInfo()39 assert(RBGPR.getSize() == 64 && "GPRs should hold up to 64-bit"); in AArch64RegisterBankInfo()
33 const RegisterBank &RBGPR = getRegBank(X86::GPRRegBankID); in X86RegisterBankInfo() local34 (void)RBGPR; in X86RegisterBankInfo()35 assert(&X86::GPRRegBank == &RBGPR && "Incorrect RegBanks inizalization."); in X86RegisterBankInfo()39 assert(RBGPR.covers(*TRI.getRegClass(X86::GR64RegClassID)) && in X86RegisterBankInfo()41 assert(RBGPR.getSize() == 64 && "GPRs should hold up to 64-bit"); in X86RegisterBankInfo()
52 const RegisterBank &RBGPR = getRegBank(AArch64::GPRRegBankID); in AArch64RegisterBankInfo() local53 (void)RBGPR; in AArch64RegisterBankInfo()54 assert(&AArch64::GPRRegBank == &RBGPR && in AArch64RegisterBankInfo()68 assert(RBGPR.covers(*TRI.getRegClass(AArch64::GPR32RegClassID)) && in AArch64RegisterBankInfo()70 assert(RBGPR.getSize() == 64 && "GPRs should hold up to 64-bit"); in AArch64RegisterBankInfo()103 CHECK_PARTIALMAP(PMI_GPR32, 0, 32, RBGPR); in AArch64RegisterBankInfo()104 CHECK_PARTIALMAP(PMI_GPR64, 0, 64, RBGPR); in AArch64RegisterBankInfo()