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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dllvm.r600.tex.ll3 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN
4 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN
5 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN
6 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN
7 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:UUNN
8 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:NNNN
9 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:NNNN
10 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:UUNN
11 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYYW}} RID:0 SID:0 CT:NNUN
12 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNUN
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dllvm.r600.tex.ll3 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN
4 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN
5 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN
6 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN
7 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:UUNN
8 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:NNNN
9 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:NNNN
10 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:UUNN
11 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYYW}} RID:0 SID:0 CT:NNUN
12 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNUN
[all …]
/external/llvm/lib/Bitcode/Writer/
DValueEnumerator.cpp163 auto RID = OM.lookup(RU->getUser()).first; in predictValueUseListOrderImpl() local
171 if (OM.isGlobalValue(LID) && OM.isGlobalValue(RID)) in predictValueUseListOrderImpl()
172 return LID < RID; in predictValueUseListOrderImpl()
175 if (LID < RID) { in predictValueUseListOrderImpl()
176 if (RID <= ID) in predictValueUseListOrderImpl()
181 if (RID < LID) { in predictValueUseListOrderImpl()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Bitcode/Writer/
DValueEnumerator.cpp194 auto RID = OM.lookup(RU->getUser()).first; in predictValueUseListOrderImpl() local
202 if (OM.isGlobalValue(LID) && OM.isGlobalValue(RID)) in predictValueUseListOrderImpl()
203 return LID < RID; in predictValueUseListOrderImpl()
206 if (LID < RID) { in predictValueUseListOrderImpl()
207 if (RID <= ID) in predictValueUseListOrderImpl()
212 if (RID < LID) { in predictValueUseListOrderImpl()
/external/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp322 MachineOperand &RID = MI.getOperand(4); in EmitInstrWithCustomInserter() local
371 .addOperand(RID) in EmitInstrWithCustomInserter()
391 .addOperand(RID) in EmitInstrWithCustomInserter()
411 .addOperand(RID) in EmitInstrWithCustomInserter()
425 MachineOperand &RID = MI.getOperand(4); in EmitInstrWithCustomInserter() local
475 .addOperand(RID) in EmitInstrWithCustomInserter()
495 .addOperand(RID) in EmitInstrWithCustomInserter()
515 .addOperand(RID) in EmitInstrWithCustomInserter()
DR600Instructions.td869 "RID:$RESOURCE_ID SID:$SAMPLER_ID "
/external/ImageMagick/PerlMagick/t/
Dinput_gray_msb_08bit.mat93 …`_XSD>ADDD;/()..,+*,.12" )6#'%&)$$%'%***)'($!" ##),,,,,*?V[1+VZ7TUU]bd[RID>=??DE@8518:;5,&%…
/external/llvm/lib/IR/
DAsmWriter.cpp162 auto RID = OM.lookup(RU->getUser()).first; in predictValueUseListOrderImpl() local
165 if (LID < RID) { in predictValueUseListOrderImpl()
167 if (RID <= ID) in predictValueUseListOrderImpl()
171 if (RID < LID) { in predictValueUseListOrderImpl()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/
DAsmWriter.cpp209 auto RID = OM.lookup(RU->getUser()).first; in predictValueUseListOrderImpl() local
212 if (LID < RID) { in predictValueUseListOrderImpl()
214 if (RID <= ID) in predictValueUseListOrderImpl()
218 if (RID < LID) { in predictValueUseListOrderImpl()
/external/clang/lib/Sema/
DSemaObjCProperty.cpp1801 if (const ObjCInterfaceDecl *RID = ID->isObjCRequiresPropertyDefs()) in DiagnoseUnimplementedAccessor() local
1802 S.Diag(RID->getLocation(), diag::note_suppressed_class_declare); in DiagnoseUnimplementedAccessor()
/external/swiftshader/third_party/llvm-7.0/llvm/docs/PDB/
DDbiStream.rst426 **Token / RID Map** - ``DbgStreamArray[6]``. The layout of this stream is not
/external/swiftshader/third_party/LLVM/lib/Analysis/
DScalarEvolution.cpp473 RID = RV->getValueID(); in compare() local
474 if (LID != RID) in compare()
475 return (int)LID - (int)RID; in compare()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DR600Instructions.td896 "RID:$RESOURCE_ID SID:$SAMPLER_ID "
/external/llvm/lib/Analysis/
DScalarEvolution.cpp498 RID = RV->getValueID(); in compare() local
499 if (LID != RID) in compare()
500 return (int)LID - (int)RID; in compare()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/
DScalarEvolution.cpp564 unsigned LID = LV->getValueID(), RID = RV->getValueID(); in CompareValueComplexity() local
565 if (LID != RID) in CompareValueComplexity()
566 return (int)LID - (int)RID; in CompareValueComplexity()
/external/libmtp/
DChangeLog4 PROVIDES EASY ACCESS TO THE CHANGELOG, LETS GET RID
/external/webrtc/talk/media/testdata/
Dfaces.1280x720_P420.yuv3 …fedehjjjjlnljklmnnmkjiijnrrssssrrtw{~}{zxwxy{�����������~}}~��}{z{zxvuvqh]RID@>><98:>>93026:;94.*…
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart2.csv4152 ,"GB","RID","Ridham Dock","Ridham Dock","KEN","1-------","AF","9511",,,
14195 ,"IT","RID","Riardo","Riardo","CE","--3-----","RL","1207",,"4116N 01409E",
21666 ,"NL","RID","Ridderkerk","Ridderkerk",,"--3-----","AF","9602",,,
D2013-1_UNLOCODE_CodeListPart1.csv3311 ,"AU","RID","Ridgehaven","Ridgehaven","SA","--3-----","RL","0901",,"3449S 13842E",
12010 "+","CH","RID","Riddes","Riddes","VS","-23-----","RL","1301",,"4610N 00714E",
23221 ,"DE","RID","Ried","Ried","HE","--3-----","RL","0207",,"5028N 00945E",
27150 ,"EE","RID","Ridala","Ridala","57","-23-----","RL","0407",,"5826N 02301E",
30387 ,"ES","RID","Ribera d'Ondana","Ribera d'Ondana","L","--3-----","RQ","0907",,"4137N 00120E",
40411 ,"FR","RID","Riedisheim","Riedisheim","68","0-------","RL","9501",,,
D2013-1_UNLOCODE_CodeListPart3.csv23043 ,"US","RID","Richmond","Richmond","IN","--34----","AI","9601",,,