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Searched refs:RTC (Results 1 – 25 of 87) sorted by relevance

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/external/u-boot/drivers/rtc/
DKconfig2 # RTC drivers configuration
8 bool "Enable Driver Model for RTC drivers"
11 Enable drver model for real-time-clock drivers. The RTC uclass
20 The PCF2127 is a CMOS Real Time Clock (RTC) and calendar with an integrated
37 The Renesas (formerly Intersil) ISL1208 is a I2C Real Time Clock (RTC) and
42 This driver supports reading and writing the RTC/calendar and detects
52 bool "Enable Marvell RTC driver"
55 Enable Marvell RTC driver. This driver supports the rtc that is present
Dmk48t59.c39 return in8(RTC(reg)); in rtc_read()
44 out8(RTC(reg),val); in rtc_write()
/external/u-boot/drivers/bootcount/
DKconfig35 bool "Boot counter in AM33XX RTC IP block"
39 A bootcount driver for the RTC IP block found on many TI platforms.
40 This requires the RTC clocks, etc, to be enabled prior to use and
41 not all boards with this IP block on it will have the RTC in use.
64 Enable support for the bootcounter on an i2c (like RTC) device.
/external/u-boot/board/keymile/km_arm/
Dkwbimage_128M16_1.cfg63 # bit 0-1: 2, Tag RAM RTC RAM0
66 # bit 9-8: 2, Valid RAM RTC RAM
68 # bit 13-12: 2, Dirty RAM RTC RAM
70 # bit 17-16: 2, Data RAM RTC RAM0
72 # bit 21-20: 2, Data RAM RTC RAM1
74 # bit 25-24: 2, Data RAM RTC RAM2
76 # bit 29-28: 2, Data RAM RTC RAM3
81 # bit 17-16: 2, ECC RAM RTC RAM0
Dkwbimage_256M8_1.cfg63 # bit 0-1: 2, Tag RAM RTC RAM0
66 # bit 9-8: 2, Valid RAM RTC RAM
68 # bit 13-12: 2, Dirty RAM RTC RAM
70 # bit 17-16: 2, Data RAM RTC RAM0
72 # bit 21-20: 2, Data RAM RTC RAM1
74 # bit 25-24: 2, Data RAM RTC RAM2
76 # bit 29-28: 2, Data RAM RTC RAM3
81 # bit 17-16: 2, ECC RAM RTC RAM0
/external/autotest/client/site_tests/kernel_Ktime/
Dcontrol7 This test is to make sure that ktime and the RTC are reasonably consistent
13 Fails if ktime and RTC do not agree.
/external/u-boot/arch/arm/mach-omap2/am33xx/
DKconfig245 prompt "Enable RTC-DDR ONLY Support"
247 If you want RTC-DDR ONLY Support, say Y. RTC Only with DDR in
249 the other voltages are turned off apart from the RTC domain and DDR.
250 So only RTC is alive and ticking and one can program it to wake
251 up after a predetermined period. Once RTC alarm fires, the PMIC
/external/u-boot/doc/
DREADME.SNTP5 syncronize RTC of the board. This command needs the command line
8 set local time to RTC, set the offset in second from UTC to the
/external/u-boot/board/freescale/m53017evb/
DREADME19 - arch/m68k/cpu/mcf532x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs
74 CONFIG_MCFRTC -- define to use common CF RTC driver
75 CONFIG_SYS_MCFRTC_BASE -- provide base address for RTC in immap.h
76 CONFIG_SYS_RTC_OSCILLATOR -- define RTC clock frequency
77 RTC_DEBUG -- define to show RTC debug message
/external/webrtc/
DREADME.md2 applications with Real-Time Communications (RTC) capabilities via simple APIs.
5 **Our mission:** To enable rich, high-quality RTC applications to be
DMETADATA2 …t provides browsers and mobile applications with Real-Time Communications (RTC) capabilities via s…
/external/u-boot/drivers/power/pmic/
DKconfig85 This is a Power Management IC with RTC, Fuel Gauge, MUIC control on Chip.
89 - RTC with two alarms
104 - RTC
115 an RTC and two low Rds (resistance (drain to source)) switches. It is
127 - RTC with two alarms
217 DC-DC converter, 8 LDOs and a RTC. This driver binds the SMPS and LDO
/external/scapy/doc/scapy/
Dadvanced_usage.rst793 PROFINET IO RTC
796RTC) layer, used to exchange data. However, this RTC layer is stateful and depends on a configurat…
798 RTC data packet
801 The first thing to do when building the RTC ``data`` buffer is to instanciate each Scapy packet whi…
827 RTC packet
830 Now that a data packet can be instanciated, a whole RTC packet may be built. ``PNIORealTime`` conta…
844 |###[ PNIO RTC IOxS ]###
849 |###[ PNIO RTC Raw data ]###
851 |###[ PNIO RTC IOxS ]###
860 |###[ PNIO RTC IOxS ]###
[all …]
/external/u-boot/doc/device-tree-bindings/clock/
Dst,stm32mp1.txt25 MPU AXI MCU PLL12 PLL3 PLL4 RTC MCO1 MCO2
32 MPU AXI MCU APB1 APB2 APB3 APB4 APB5 RTC MCO1 MCO2
43 but for RTC MCO1 MCO2, the coding is different:
125 23 /*RTC*/
/external/u-boot/board/freescale/m52277evb/
DREADME18 - arch/m68k/cpu/mcf5227x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs
75 CONFIG_MCFRTC -- define to use common CF RTC driver
76 CONFIG_SYS_MCFRTC_BASE -- provide base address for RTC in immap.h
77 CONFIG_SYS_RTC_OSCILLATOR -- define RTC clock frequency
78 RTC_DEBUG -- define to show RTC debug message
/external/autotest/server/site_tests/network_WiFi_DarkResumeActiveScans/
Dcontrol26 However, when the system wakes up due to a RTC timer (e.g. the periodic scan
32 that are triggered by RTC timers or packet pattern matches. Verify this by
/external/autotest/client/site_tests/power_WakeupRTC/
Dcontrol14 Tests that RTC devices generate wakeup events.
/external/u-boot/arch/arm/dts/
Dam335x-bone-common.dtsi298 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
299 * mode") at poweroff. Most BeagleBone versions do not support RTC-only
310 * if you want to use RTC-only mode and made sure you are not affected
/external/u-boot/include/configs/
Dls1012aqds.h56 #define RTC macro
/external/autotest/server/site_tests/power_WakeSources/
Dcontrol21 2. Wake by RTC triggers a dark resume.
/external/u-boot/board/freescale/m5373evb/
DREADME19 - arch/m68k/cpu/mcf532x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs
73 CONFIG_MCFRTC -- define to use common CF RTC driver
74 CONFIG_SYS_MCFRTC_BASE -- provide base address for RTC in immap.h
75 CONFIG_SYS_RTC_OSCILLATOR -- define RTC clock frequency
76 RTC_DEBUG -- define to show RTC debug message
/external/autotest/client/site_tests/power_Standby/
Dcontrol.1hour15 Test uses RTC wake to transition from suspend to S0 every sample_hours for a
Dcontrol.fast16 Test uses RTC wake to transition from suspend to S0 every sample_hours for a
Dcontrol.fast_force_discharge15 Test uses RTC wake to transition from suspend to S0 every sample_hours for a
/external/scapy/scapy/contrib/
Dpnio_rtc.uts1 % PNIO RTC layer test campaign
4 = Import the PNIO RTC layer

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