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Searched refs:SCFG_DPSLPCR_WDRR_EN (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/board/freescale/common/
Darm_sleep.c93 tmp &= ~SCFG_DPSLPCR_WDRR_EN; in ls1_psci_resume_fixup()
/external/u-boot/arch/arm/cpu/armv7/ls102xa/
Dls102xa_psci.c192 setbits_be32(&scfg->dpslpcr, SCFG_DPSLPCR_WDRR_EN); in ls1_deep_sleep()
/external/u-boot/arch/arm/include/asm/arch-ls102xa/
Dimmap_ls102xa.h164 #define SCFG_DPSLPCR_WDRR_EN 0x00000001 macro