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Searched refs:SCG_SOSC_DIV2_CLK (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx7ulp/
Dclock.c262 lpuart_set_clk(index, SCG_SOSC_DIV2_CLK); in init_clk_lpuart()
Dpcc.c26 { SCG_SOSC_DIV2_CLK, /* SOSC BUS clock */
Dscg.c138 case SCG_SOSC_DIV2_CLK: in scg_soscdiv_get_rate()
569 case SCG_SOSC_DIV2_CLK: in scg_clk_get_rate()
/external/u-boot/arch/arm/include/asm/arch-mx7ulp/
Dscg.h213 SCG_SOSC_DIV2_CLK, enumerator