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Searched refs:SCLK_UART0 (Results 1 – 25 of 25) sorted by relevance

/external/u-boot/include/dt-bindings/clock/
Drk3128-cru.h22 #define SCLK_UART0 77 macro
Drk3036-cru.h23 #define SCLK_UART0 77 macro
Dexynos7420-clk.h82 #define SCLK_UART0 2 macro
Drk3228-cru.h23 #define SCLK_UART0 77 macro
Drk3188-cru-common.h20 #define SCLK_UART0 64 macro
Drv1108-cru.h23 #define SCLK_UART0 72 macro
Drk3288-cru.h29 #define SCLK_UART0 77 macro
Drk3368-cru.h39 #define SCLK_UART0 77 macro
Drk3328-cru.h26 #define SCLK_UART0 38 macro
Drk3399-cru.h37 #define SCLK_UART0 81 macro
/external/u-boot/doc/device-tree-bindings/clock/
Drockchip,rk3288-cru.txt60 clocks = <&cru SCLK_UART0>;
Drockchip,rk3188-cru.txt60 clocks = <&cru SCLK_UART0>;
/external/u-boot/drivers/clk/rockchip/
Dclk_rk3328.c617 case SCLK_UART0: in rk3328_clk_set_rate()
738 case SCLK_UART0: in rk3328_clk_set_parent()
Dclk_rk3288.c835 case SCLK_UART0: in rk3288_clk_set_rate()
Dclk_rk3399.c854 case SCLK_UART0: in rk3399_clk_get_rate()
/external/u-boot/arch/arm/dts/
Drk3036.dtsi117 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
Drk3xxx.dtsi121 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
Drv1108.dtsi116 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
Drk3328.dtsi205 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
370 <&cru SCLK_RTC32K>, <&cru SCLK_UART0>,
Drk3288-veyron.dtsi555 assigned-clocks = <&cru SCLK_UART0>;
Drk322x.dtsi178 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
Drk3128.dtsi264 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
Drk3368.dtsi387 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
Drk3288.dtsi327 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
Drk3399.dtsi530 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;