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Searched refs:SCTLR_EL1_UCI_DIS (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/
Dsystem.h92 #define SCTLR_EL1_UCI_DIS (0 << 26) /* Cache instruction disabled */ macro
Dmacro.h266 ldr \tmp, =(SCTLR_EL1_RES1 | SCTLR_EL1_UCI_DIS |\