Searched refs:SC_CPLLCTRL (Results 1 – 3 of 3) sorted by relevance
14 #define SC_CPLLCTRL (SC_BASE_ADDR | 0x1400) /* CPU/ARM */ macro26 uniphier_ld20_sscpll_init(SC_CPLLCTRL, 1960, 1, 2); /* 2000MHz -> 1960MHz */ in uniphier_ld11_pll_init()35 uniphier_ld20_sscpll_ssc_en(SC_CPLLCTRL); in uniphier_ld11_pll_init()
14 #define SC_CPLLCTRL (SC_BASE_ADDR | 0x1400) /* CPU/ARM */ macro34 uniphier_ld20_sscpll_init(SC_CPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4); in uniphier_ld20_pll_init()43 uniphier_ld20_sscpll_ssc_en(SC_CPLLCTRL); in uniphier_ld20_pll_init()
13 #define SC_CPLLCTRL (SC_BASE_ADDR | 0x1400) /* CPU/ARM */ macro35 uniphier_ld20_sscpll_init(SC_CPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4); in uniphier_pxs3_pll_init()47 uniphier_ld20_sscpll_ssc_en(SC_CPLLCTRL); in uniphier_pxs3_pll_init()