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Searched refs:SD1_ITAPDLYSEL_SD_DDR50 (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/board/xilinx/zynqmp/
Dtap_delays.c33 #define SD1_ITAPDLYSEL_SD_DDR50 0x003D0000 macro
172 SD1_ITAPDLYSEL_SD_DDR50); in arasan_zynqmp_tap_ddr50()