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Searched refs:SD1_OTAPDLYSEL_SD_DDR50 (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/board/xilinx/zynqmp/
Dtap_delays.c51 #define SD1_OTAPDLYSEL_SD_DDR50 0x00040000 macro
180 SD1_OTAPDLYSEL_SD_DDR50); in arasan_zynqmp_tap_ddr50()