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Searched refs:SDIVREM8_SEXT_HREG (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp2316 case X86ISD::SDIVREM8_SEXT_HREG: in Select()
2322 Opcode == X86ISD::SDIVREM8_SEXT_HREG); in Select()
2458 Opcode == X86ISD::SDIVREM8_SEXT_HREG) { in Select()
2462 assert(Opcode != X86ISD::SDIVREM8_SEXT_HREG && in Select()
DX86ISelLowering.h356 SDIVREM8_SEXT_HREG, enumerator
DX86ISelLowering.cpp22210 case X86ISD::SDIVREM8_SEXT_HREG: return "X86ISD::SDIVREM8_SEXT_HREG"; in getTargetNodeName()
30061 auto DivRemOpcode = OpcodeN0 == ISD::SDIVREM ? X86ISD::SDIVREM8_SEXT_HREG in getDivRem8()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp3070 case X86ISD::SDIVREM8_SEXT_HREG: in Select()
3077 Opcode == X86ISD::SDIVREM8_SEXT_HREG); in Select()
3217 Opcode == X86ISD::SDIVREM8_SEXT_HREG) { in Select()
DX86ISelLowering.h366 SDIVREM8_SEXT_HREG, enumerator
DX86ISelLowering.cpp26034 case X86ISD::SDIVREM8_SEXT_HREG: return "X86ISD::SDIVREM8_SEXT_HREG"; in getTargetNodeName()
29102 case X86ISD::SDIVREM8_SEXT_HREG: in ComputeNumSignBitsForTargetNode()
37524 auto DivRemOpcode = OpcodeN0 == ISD::SDIVREM ? X86ISD::SDIVREM8_SEXT_HREG in getDivRem8()