| /external/clang/test/CodeGenCXX/ |
| D | rtti-layout.cpp | 73 struct SI1 : A { }; struct
114 CHECK_VTABLE(SI1, si_class); in f()
115 CHECK(to<__si_class_type_info>(typeid(SI1)).__base_type == &typeid(A)); in f()
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| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| D | InstCombineAndOrXor.cpp | 1258 if (BinaryOperator *SI1 = dyn_cast<BinaryOperator>(Op1)) { in visitAnd() local
1260 if (SI0->isShift() && SI0->getOpcode() == SI1->getOpcode() && in visitAnd()
1261 SI0->getOperand(1) == SI1->getOperand(1) && in visitAnd()
1262 (SI0->hasOneUse() || SI1->hasOneUse())) { in visitAnd()
1264 Builder->CreateAnd(SI0->getOperand(0), SI1->getOperand(0), in visitAnd()
1266 return BinaryOperator::Create(SI1->getOpcode(), NewOp, in visitAnd()
1267 SI1->getOperand(1)); in visitAnd()
1943 if (BinaryOperator *SI1 = dyn_cast<BinaryOperator>(Op1)) { in visitOr() local
1945 if (SI0->isShift() && SI0->getOpcode() == SI1->getOpcode() && in visitOr()
1946 SI0->getOperand(1) == SI1->getOperand(1) && in visitOr()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/IR/ |
| D | PatternMatch.cpp | 469 Value *SI1 = IRB.CreateShuffleVector(VI1, UndefVec, Zero); in TEST_F() local
509 EXPECT_TRUE(match(SI1, m_ShuffleVector(m_Value(), m_Undef(), m_Zero()))); in TEST_F()
518 SI1, in TEST_F()
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstructionCombining.cpp | 634 if (auto *SI1 = dyn_cast<SelectInst>(RHS)) { in SimplifyUsingDistributiveLaws() local
635 if (SI0->getCondition() == SI1->getCondition()) { in SimplifyUsingDistributiveLaws()
638 SI1->getFalseValue(), DL, TLI, DT, AC)) in SimplifyUsingDistributiveLaws()
642 SI1->getTrueValue()), in SimplifyUsingDistributiveLaws()
645 SI1->getTrueValue(), DL, TLI, DT, AC)) in SimplifyUsingDistributiveLaws()
649 SI1->getFalseValue())); in SimplifyUsingDistributiveLaws()
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| /external/zlib/src/doc/ |
| D | rfc1952.txt | 438 |SI1|SI2| LEN |... LEN bytes of subfield data ...|
441 SI1 and SI2 provide a subfield ID, typically two ASCII letters
455 SI1 SI2 Data
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
| D | SimplifyCFG.cpp | 211 SafeToMergeTerminators(TerminatorInst *SI1, TerminatorInst *SI2, in SafeToMergeTerminators() argument
213 if (SI1 == SI2) in SafeToMergeTerminators()
219 BasicBlock *SI1BB = SI1->getParent(); in SafeToMergeTerminators()
243 isProfitableToFoldUnconditional(BranchInst *SI1, BranchInst *SI2, in isProfitableToFoldUnconditional() argument
246 if (SI1 == SI2) in isProfitableToFoldUnconditional()
248 assert(SI1->isUnconditional() && SI2->isConditional()); in isProfitableToFoldUnconditional()
264 BasicBlock *SI1BB = SI1->getParent(); in isProfitableToFoldUnconditional()
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| /external/llvm/lib/Transforms/Utils/ |
| D | SimplifyCFG.cpp | 177 static bool SafeToMergeTerminators(TerminatorInst *SI1, TerminatorInst *SI2) { in SafeToMergeTerminators() argument
178 if (SI1 == SI2) in SafeToMergeTerminators()
184 BasicBlock *SI1BB = SI1->getParent(); in SafeToMergeTerminators()
204 isProfitableToFoldUnconditional(BranchInst *SI1, BranchInst *SI2, in isProfitableToFoldUnconditional() argument
207 if (SI1 == SI2) in isProfitableToFoldUnconditional()
209 assert(SI1->isUnconditional() && SI2->isConditional()); in isProfitableToFoldUnconditional()
225 BasicBlock *SI1BB = SI1->getParent(); in isProfitableToFoldUnconditional()
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| /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/ |
| D | SimplifyCFG.cpp | 84 static bool SafeToMergeTerminators(TerminatorInst *SI1, TerminatorInst *SI2) { in SafeToMergeTerminators() argument
85 if (SI1 == SI2) return false; // Can't merge with self! in SafeToMergeTerminators()
90 BasicBlock *SI1BB = SI1->getParent(); in SafeToMergeTerminators()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 10273 auto SI1 = SelectTruncOp[1].find(PromOp.getNode()); in DAGCombineExtBoolTrunc() local
10274 if (SI1 != SelectTruncOp[1].end()) in DAGCombineExtBoolTrunc()
10275 Ops[1] = DAG.getNode(ISD::TRUNCATE, dl, SI1->second, Ops[1]); in DAGCombineExtBoolTrunc()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 11721 auto SI1 = SelectTruncOp[1].find(PromOp.getNode()); in DAGCombineExtBoolTrunc() local
11722 if (SI1 != SelectTruncOp[1].end()) in DAGCombineExtBoolTrunc()
11723 Ops[1] = DAG.getNode(ISD::TRUNCATE, dl, SI1->second, Ops[1]); in DAGCombineExtBoolTrunc()
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| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | 3d3fb7fca46cf046654b3288e5da3369.000fe6ac.honggfuzz.cov | 675 …L����["���>%~��"tjy���m�R(k��u��SʘRB�����������^�<�X �.A�@������1�SI1^͇�K��;��/X!S�\� ��…
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| D | 55044c8be4ce1a6abbad09188436d970.000fe6ac.honggfuzz.cov | 675 …L����["���>%~��"tjy���m�R(k��u��SʘRB�����������^�<�X �.A�@������1�SI1^͇�K��;��/X!S�\� ��…
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