Home
last modified time | relevance | path

Searched refs:SINT_TO_FP (Results 1 – 25 of 91) sorted by relevance

1234

/external/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp129 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost()
132 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
134 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 }, in getCastInstrCost()
136 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
138 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 }, in getCastInstrCost()
140 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, in getCastInstrCost()
142 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost()
144 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }, in getCastInstrCost()
146 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 }, in getCastInstrCost()
148 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 }, in getCastInstrCost()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp190 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost()
193 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
195 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 }, in getCastInstrCost()
197 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
199 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 }, in getCastInstrCost()
201 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, in getCastInstrCost()
203 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost()
205 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }, in getCastInstrCost()
207 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 }, in getCastInstrCost()
209 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 }, in getCastInstrCost()
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp215 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
216 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost()
217 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost()
223 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
224 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, in getCastInstrCost()
225 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, in getCastInstrCost()
231 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 4 }, in getCastInstrCost()
232 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost()
237 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i8, 10 }, in getCastInstrCost()
238 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }, in getCastInstrCost()
[all …]
/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp575 { ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i1, 4 }, in getCastInstrCost()
576 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i1, 3 }, in getCastInstrCost()
577 { ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i8, 2 }, in getCastInstrCost()
578 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i8, 2 }, in getCastInstrCost()
579 { ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i16, 2 }, in getCastInstrCost()
580 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i16, 2 }, in getCastInstrCost()
581 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i32, 1 }, in getCastInstrCost()
582 { ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i32, 1 }, in getCastInstrCost()
673 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 }, in getCastInstrCost()
674 { ISD::SINT_TO_FP, MVT::v4f64, MVT::v4i1, 3 }, in getCastInstrCost()
[all …]
DX86IntrinsicsInfo.h501 ISD::SINT_TO_FP, 0),
503 ISD::SINT_TO_FP, 0), // no rm
505 ISD::SINT_TO_FP, 0),
507 ISD::SINT_TO_FP, 0),
509 ISD::SINT_TO_FP, ISD::SINT_TO_FP), //er
571 ISD::SINT_TO_FP, 0),
573 ISD::SINT_TO_FP, 0),
575 ISD::SINT_TO_FP, ISD::SINT_TO_FP),
577 ISD::SINT_TO_FP, 0),
579 ISD::SINT_TO_FP, 0),
[all …]
DREADME-FPStack.txt49 Add a target specific hook to DAG combiner to handle SINT_TO_FP and
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp318 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
319 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost()
320 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost()
326 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
327 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, in getCastInstrCost()
328 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, in getCastInstrCost()
334 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 4 }, in getCastInstrCost()
335 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost()
340 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i8, 10 }, in getCastInstrCost()
341 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }, in getCastInstrCost()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp1149 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i64, 1 }, in getCastInstrCost()
1150 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost()
1151 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i64, 1 }, in getCastInstrCost()
1152 { ISD::SINT_TO_FP, MVT::v4f64, MVT::v4i64, 1 }, in getCastInstrCost()
1153 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i64, 1 }, in getCastInstrCost()
1154 { ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i64, 1 }, in getCastInstrCost()
1203 { ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i1, 4 }, in getCastInstrCost()
1204 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i1, 3 }, in getCastInstrCost()
1205 { ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i8, 2 }, in getCastInstrCost()
1206 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i8, 2 }, in getCastInstrCost()
[all …]
DREADME-FPStack.txt49 Add a target specific hook to DAG combiner to handle SINT_TO_FP and
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp195 case ISD::SINT_TO_FP: in LegalizeOp()
304 if (!TLI.isOperationLegalOrCustom(ISD::SINT_TO_FP, VT) || in ExpandUINT_TO_FLOAT()
330 SDValue fHI = DAG.getNode(ISD::SINT_TO_FP, DL, Op.getValueType(), HI); in ExpandUINT_TO_FLOAT()
332 SDValue fLO = DAG.getNode(ISD::SINT_TO_FP, DL, Op.getValueType(), LO); in ExpandUINT_TO_FLOAT()
DLegalizeFloatTypes.cpp96 case ISD::SINT_TO_FP: in SoftenFloatResult()
540 bool Signed = N->getOpcode() == ISD::SINT_TO_FP; in SoftenFloatRes_XINT_TO_FP()
874 case ISD::SINT_TO_FP: in ExpandFloatResult()
1172 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP; in ExpandFloatRes_XINT_TO_FP()
1183 Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src); in ExpandFloatRes_XINT_TO_FP()
DLegalizeDAG.cpp805 case ISD::SINT_TO_FP: in LegalizeOp()
2548 SDValue Fast = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, Op0); in ExpandLegalINT_TO_FP()
2557 SDValue SignCvt = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, Or); in ExpandLegalINT_TO_FP()
2600 SDValue Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0); in ExpandLegalINT_TO_FP()
2664 if (TLI.isOperationLegalOrCustom(ISD::SINT_TO_FP, NewInTy)) { in PromoteLegalINT_TO_FP()
2665 OpToUse = ISD::SINT_TO_FP; in PromoteLegalINT_TO_FP()
3134 case ISD::SINT_TO_FP: in ExpandNode()
3136 Tmp1 = ExpandLegalINT_TO_FP(Node->getOpcode() == ISD::SINT_TO_FP, in ExpandNode()
3829 Node->getOpcode() == ISD::SINT_TO_FP || in PromoteNode()
3875 case ISD::SINT_TO_FP: in PromoteNode()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dpr23273.ll5 ; for SINT_TO_FP wrongly assumed that the target had at least SSE2.
/external/llvm/test/CodeGen/X86/
Dpr23273.ll5 ; for SINT_TO_FP wrongly assumed that the target had at least SSE2.
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Ddagcombiner-bug-illegal-vec4-int-to-fp.ll7 ; ISD::UINT_TO_FP and ISD::SINT_TO_FP opcodes.
/external/llvm/test/CodeGen/AMDGPU/
Ddagcombiner-bug-illegal-vec4-int-to-fp.ll7 ; ISD::UINT_TO_FP and ISD::SINT_TO_FP opcodes.
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp340 case ISD::SINT_TO_FP: in LegalizeOp()
387 case ISD::SINT_TO_FP: in Promote()
983 if (TLI.getOperationAction(ISD::SINT_TO_FP, VT) == TargetLowering::Expand || in ExpandUINT_TO_FLOAT()
1010 SDValue fHI = DAG.getNode(ISD::SINT_TO_FP, DL, Op.getValueType(), HI); in ExpandUINT_TO_FLOAT()
1012 SDValue fLO = DAG.getNode(ISD::SINT_TO_FP, DL, Op.getValueType(), LO); in ExpandUINT_TO_FLOAT()
DLegalizeDAG.cpp964 case ISD::SINT_TO_FP: in LegalizeOp()
2364 SDValue Fast = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, Op0); in ExpandLegalINT_TO_FP()
2373 SDValue SignCvt = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, Or); in ExpandLegalINT_TO_FP()
2419 SDValue Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0); in ExpandLegalINT_TO_FP()
2489 if (TLI.isOperationLegalOrCustom(ISD::SINT_TO_FP, NewInTy)) { in PromoteLegalINT_TO_FP()
2490 OpToUse = ISD::SINT_TO_FP; in PromoteLegalINT_TO_FP()
2926 case ISD::SINT_TO_FP: in ExpandNode()
2928 Tmp1 = ExpandLegalINT_TO_FP(Node->getOpcode() == ISD::SINT_TO_FP, in ExpandNode()
3998 Node->getOpcode() == ISD::SINT_TO_FP || in PromoteNode()
4056 case ISD::SINT_TO_FP: in PromoteNode()
[all …]
DLegalizeFloatTypes.cpp109 case ISD::SINT_TO_FP: in SoftenFloatResult()
707 bool Signed = N->getOpcode() == ISD::SINT_TO_FP; in SoftenFloatRes_XINT_TO_FP()
1044 case ISD::SINT_TO_FP: in ExpandFloatResult()
1411 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP; in ExpandFloatRes_XINT_TO_FP()
1423 Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src); in ExpandFloatRes_XINT_TO_FP()
1908 case ISD::SINT_TO_FP: in PromoteFloatResult()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h372 SINT_TO_FP, enumerator
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DREADME-FPStack.txt49 Add a target specific hook to DAG combiner to handle SINT_TO_FP and
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h405 SINT_TO_FP, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp403 case ISD::SINT_TO_FP: in LegalizeOp()
459 case ISD::SINT_TO_FP: in Promote()
1032 if (TLI.getOperationAction(ISD::SINT_TO_FP, VT) == TargetLowering::Expand || in ExpandUINT_TO_FLOAT()
1058 SDValue fHI = DAG.getNode(ISD::SINT_TO_FP, DL, Op.getValueType(), HI); in ExpandUINT_TO_FLOAT()
1060 SDValue fLO = DAG.getNode(ISD::SINT_TO_FP, DL, Op.getValueType(), LO); in ExpandUINT_TO_FLOAT()
DLegalizeFloatTypes.cpp109 case ISD::SINT_TO_FP: in SoftenFloatResult()
708 bool Signed = N->getOpcode() == ISD::SINT_TO_FP; in SoftenFloatRes_XINT_TO_FP()
1098 case ISD::SINT_TO_FP: in ExpandFloatResult()
1465 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP; in ExpandFloatRes_XINT_TO_FP()
1477 Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src); in ExpandFloatRes_XINT_TO_FP()
1927 case ISD::SINT_TO_FP: in PromoteFloatResult()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h450 SINT_TO_FP, enumerator

1234