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Searched refs:SOCFPGA_SDR_ADDRESS (Results 1 – 7 of 7) sorted by relevance

/external/u-boot/drivers/ddr/altera/
Dsequencer.h83 #define SDR_PHYGRP_SCCGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x0)
84 #define SDR_PHYGRP_PHYMGRGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x1000)
85 #define SDR_PHYGRP_RWMGRGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x2000)
86 #define SDR_PHYGRP_DATAMGRGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x4000)
87 #define SDR_PHYGRP_REGFILEGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x4800)
Dsdram_arria10.c46 (void *)SOCFPGA_SDR_ADDRESS;
/external/u-boot/arch/arm/mach-socfpga/include/mach/
Dbase_addr_s10.h12 #define SOCFPGA_SDR_ADDRESS 0xf8011000 macro
Dbase_addr_a10.h42 #define SOCFPGA_SDR_ADDRESS 0xffcfb000 macro
Dbase_addr_ac5.h29 #define SOCFPGA_SDR_ADDRESS 0xffc20000 macro
Dsdram_gen5.h22 #define SDR_CTRLGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x5000)
/external/u-boot/drivers/fpga/
Dsocfpga_gen5.c221 writel(0, SOCFPGA_SDR_ADDRESS + SDR_CTRLGRP_FPGAPORTRST_ADDRESS); in socfpga_load()