/external/v8/src/arm64/ |
D | macro-assembler-arm64-inl.h | 208 void MacroAssembler::Sbcs(const Register& rd, in Sbcs() function 231 Sbcs(rd, zr, operand); in Ngcs()
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D | macro-assembler-arm64.h | 1281 inline void Sbcs(const Register& rd, const Register& rn,
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/external/vixl/test/aarch32/ |
D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 133 M(Sbcs) \
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D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 133 M(Sbcs) \
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D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 133 M(Sbcs) \
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D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 133 M(Sbcs) \
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D | test-simulator-cond-rd-rn-operand-const-a32.cc | 133 M(Sbcs) \
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D | test-simulator-cond-rd-rn-operand-const-t32.cc | 133 M(Sbcs) \
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D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 133 M(Sbcs) \
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D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 133 M(Sbcs) \
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D | test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc | 133 M(Sbcs) \
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D | test-disasm-a32.cc | 1539 COMPARE_BOTH(Sbcs(r0, r1, -5), "adcs r0, r1, #4\n"); in TEST()
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/external/vixl/src/aarch64/ |
D | macro-assembler-aarch64.cc | 1797 void MacroAssembler::Sbcs(const Register& rd, in Sbcs() function in vixl::aarch64::MacroAssembler 1815 Sbcs(rd, zr, operand); in Ngcs()
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D | macro-assembler-aarch64.h | 691 void Sbcs(const Register& rd, const Register& rn, const Operand& operand);
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/external/vixl/src/aarch32/ |
D | macro-assembler-aarch32.h | 3371 Sbcs(cond, rd, rn, operand); in Sbc() 3378 Sbcs(cond, rd, rn, operand); in Sbc() 3392 void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) { in Sbcs() function 3402 void Sbcs(Register rd, Register rn, const Operand& operand) { in Sbcs() function 3403 Sbcs(al, rd, rn, operand); in Sbcs()
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/external/vixl/test/aarch64/ |
D | test-assembler-aarch64.cc | 9071 AdcsSbcsHelper(&MacroAssembler::Sbcs, in TEST() 9077 AdcsSbcsHelper(&MacroAssembler::Sbcs, in TEST() 9261 AdcsSbcsHelper(&MacroAssembler::Sbcs, in TEST() 9267 AdcsSbcsHelper(&MacroAssembler::Sbcs, in TEST()
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