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Searched refs:TTBCR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/cpu/armv7/ls102xa/
Dcpu.c66 #define TTBCR (TTBCR_SHARED_NON | \ macro
185 : : "r" (TTBCR) : "memory"); in mmu_setup()
/external/u-boot/arch/arm/mach-uniphier/arm32/
Dlowlevel_init.S53 mrc p15, 0, r0, c2, c0, 2 @ TTBCR (Translation Table Base Control Register)