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Searched refs:UseIdx (Results 1 – 25 of 81) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/
DMCInstrItineraries.h183 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding() argument
193 if ((FirstUseIdx + UseIdx) >= LastUseIdx) in hasPipelineForwarding()
197 Forwardings[FirstUseIdx + UseIdx]; in hasPipelineForwarding()
204 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency() argument
212 int UseCycle = getOperandCycle(UseClass, UseIdx); in getOperandLatency()
218 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx)) in getOperandLatency()
DMCSubtargetInfo.h137 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles() argument
144 if (I->UseIdx < UseIdx) in getReadAdvanceCycles()
146 if (I->UseIdx > UseIdx) in getReadAdvanceCycles()
DMCSchedule.h96 unsigned UseIdx; member
101 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
/external/swiftshader/third_party/LLVM/include/llvm/MC/
DMCInstrItineraries.h200 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding() argument
210 if ((FirstUseIdx + UseIdx) >= LastUseIdx) in hasPipelineForwarding()
214 Forwardings[FirstUseIdx + UseIdx]; in hasPipelineForwarding()
221 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency() argument
229 int UseCycle = getOperandCycle(UseClass, UseIdx); in getOperandLatency()
235 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx)) in getOperandLatency()
/external/llvm/include/llvm/MC/
DMCInstrItineraries.h187 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding() argument
197 if ((FirstUseIdx + UseIdx) >= LastUseIdx) in hasPipelineForwarding()
201 Forwardings[FirstUseIdx + UseIdx]; in hasPipelineForwarding()
208 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency() argument
216 int UseCycle = getOperandCycle(UseClass, UseIdx); in getOperandLatency()
222 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx)) in getOperandLatency()
DMCSubtargetInfo.h136 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles() argument
143 if (I->UseIdx < UseIdx) in getReadAdvanceCycles()
145 if (I->UseIdx > UseIdx) in getReadAdvanceCycles()
DMCSchedule.h87 unsigned UseIdx; member
92 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
/external/swiftshader/third_party/LLVM/lib/Target/
DTargetInstrInfo.cpp67 const MachineInstr *UseMI, unsigned UseIdx) const { in getOperandLatency()
73 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
79 SDNode *UseNode, unsigned UseIdx) const { in getOperandLatency()
90 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMBaseInstrInfo.h210 const MachineInstr *UseMI, unsigned UseIdx) const;
214 SDNode *UseNode, unsigned UseIdx) const;
233 unsigned UseIdx, unsigned UseAlign) const;
237 unsigned UseIdx, unsigned UseAlign) const;
242 unsigned UseIdx, unsigned UseAlign) const;
253 const MachineInstr *UseMI, unsigned UseIdx) const;
DARMBaseInstrInfo.cpp2161 unsigned UseIdx, unsigned UseAlign) const { in getVSTMUseCycle() argument
2162 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1; in getVSTMUseCycle()
2164 return ItinData->getOperandCycle(UseClass, UseIdx); in getVSTMUseCycle()
2201 unsigned UseIdx, unsigned UseAlign) const { in getSTMUseCycle() argument
2202 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1; in getSTMUseCycle()
2204 return ItinData->getOperandCycle(UseClass, UseIdx); in getSTMUseCycle()
2231 unsigned UseIdx, unsigned UseAlign) const { in getOperandLatency() argument
2235 if (DefIdx < DefMCID.getNumDefs() && UseIdx < UseMCID.getNumOperands()) in getOperandLatency()
2236 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
2286 UseCycle = ItinData->getOperandCycle(UseClass, UseIdx); in getOperandLatency()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/
DLiveRangeEdit.cpp84 SlotIndex UseIdx, in allUsesAvailableAt() argument
87 UseIdx = UseIdx.getUseIndex(); in allUsesAvailableAt()
105 if (OVNI != li.getVNInfoAt(UseIdx)) in allUsesAvailableAt()
112 SlotIndex UseIdx, in canRematerializeAt() argument
136 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx, lis)) in canRematerializeAt()
DLiveRangeEdit.h82 SlotIndex UseIdx, LiveIntervals &lis);
159 SlotIndex UseIdx,
/external/llvm/lib/CodeGen/
DTargetSchedule.cpp144 unsigned UseIdx = 0; in findUseIdx() local
148 ++UseIdx; in findUseIdx()
150 return UseIdx; in findUseIdx()
202 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
203 int Advance = STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID); in computeOperandLatency()
DLiveRangeEdit.cpp87 SlotIndex UseIdx) const { in allUsesAvailableAt()
89 UseIdx = UseIdx.getRegSlot(true); in allUsesAvailableAt()
110 if (SlotIndex::isSameInstr(OrigIdx, UseIdx)) in allUsesAvailableAt()
113 if (OVNI != li.getVNInfoAt(UseIdx)) in allUsesAvailableAt()
120 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt() argument
137 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx)) in canRematerializeAt()
DLiveRangeCalc.cpp186 SlotIndex UseIdx; in extendToUses() local
191 UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo+1).getMBB()); in extendToUses()
203 UseIdx = Indexes->getInstructionIndex(*MI).getRegSlot(isEarlyClobber); in extendToUses()
208 extend(LR, UseIdx, Reg); in extendToUses()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DLiveRangeEdit.cpp109 SlotIndex UseIdx) const { in allUsesAvailableAt()
111 UseIdx = UseIdx.getRegSlot(true); in allUsesAvailableAt()
132 if (SlotIndex::isSameInstr(OrigIdx, UseIdx)) in allUsesAvailableAt()
135 if (OVNI != li.getVNInfoAt(UseIdx)) in allUsesAvailableAt()
142 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt() argument
159 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx)) in canRematerializeAt()
DTargetSchedule.cpp175 unsigned UseIdx = 0; in findUseIdx() local
179 ++UseIdx; in findUseIdx()
181 return UseIdx; in findUseIdx()
233 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
234 int Advance = STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID); in computeOperandLatency()
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h284 unsigned UseIdx) const override;
287 SDNode *UseNode, unsigned UseIdx) const override;
317 unsigned UseIdx, unsigned UseAlign) const;
321 unsigned UseIdx, unsigned UseAlign) const;
326 unsigned UseIdx, unsigned UseAlign) const;
332 const MachineInstr &UseMI, unsigned UseIdx,
348 unsigned UseIdx) const override;
/external/llvm/lib/Target/PowerPC/
DPPCVSXSwapRemoval.cpp672 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
674 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs()
675 SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
683 DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
715 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
717 if (SwapVector[UseIdx].VSEMI->getOpcode() != MI->getOpcode()) { in recordUnoptimizableWebs()
725 DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
726 DEBUG(SwapVector[UseIdx].VSEMI->dump()); in recordUnoptimizableWebs()
756 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
757 SwapVector[UseIdx].WillRemove = 1; in markSwapsForRemoval()
DPPCInstrInfo.h121 unsigned UseIdx) const override;
124 SDNode *UseNode, unsigned UseIdx) const override { in getOperandLatency() argument
126 UseNode, UseIdx); in getOperandLatency()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCVSXSwapRemoval.cpp681 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
683 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs()
684 SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
692 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
724 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
726 if (SwapVector[UseIdx].VSEMI->getOpcode() != MI->getOpcode()) { in recordUnoptimizableWebs()
735 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
736 LLVM_DEBUG(SwapVector[UseIdx].VSEMI->dump()); in recordUnoptimizableWebs()
766 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
767 SwapVector[UseIdx].WillRemove = 1; in markSwapsForRemoval()
DPPCInstrInfo.h176 unsigned UseIdx) const override;
179 SDNode *UseNode, unsigned UseIdx) const override { in getOperandLatency() argument
181 UseNode, UseIdx); in getOperandLatency()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h315 unsigned UseIdx) const override;
318 SDNode *UseNode, unsigned UseIdx) const override;
348 unsigned UseIdx, unsigned UseAlign) const;
352 unsigned UseIdx, unsigned UseAlign) const;
357 unsigned UseIdx, unsigned UseAlign) const;
363 const MachineInstr &UseMI, unsigned UseIdx,
379 unsigned UseIdx) const override;
/external/llvm/include/llvm/CodeGen/
DLiveRangeEdit.h93 SlotIndex UseIdx) const;
204 bool canRematerializeAt(Remat &RM, VNInfo *OrigVNI, SlotIndex UseIdx,
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DLiveRangeEdit.h103 SlotIndex UseIdx) const;
213 bool canRematerializeAt(Remat &RM, VNInfo *OrigVNI, SlotIndex UseIdx,

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