Searched refs:VROR (Results 1 – 4 of 4) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 413 HalfV0 = DAG.getNode(HexagonISD::VROR, dl, VecTy, {N, S}); in buildHvxVectorReg()
414 HalfV1 = DAG.getNode(HexagonISD::VROR, dl, VecTy, {M, S}); in buildHvxVectorReg()
417 HalfV0 = DAG.getNode(HexagonISD::VROR, dl, VecTy, in buildHvxVectorReg()
505 Vec = DAG.getNode(HexagonISD::VROR, dl, ByteTy, Vec, S4); in createHvxPrefixPred()
643 SDValue RotV = DAG.getNode(HexagonISD::VROR, dl, VecTy, {VecV, MaskV}); in insertHvxElementReg()
647 SDValue TorV = DAG.getNode(HexagonISD::VROR, dl, VecTy, {InsV, SubV}); in insertHvxElementReg()
851 SingleV = DAG.getNode(HexagonISD::VROR, dl, SingleTy, SingleV, IdxV); in insertHvxSubvectorReg()
865 SingleV = DAG.getNode(HexagonISD::VROR, dl, SingleTy, SingleV, in insertHvxSubvectorReg()
874 SingleV = DAG.getNode(HexagonISD::VROR, dl, SingleTy, SingleV, RolV); in insertHvxSubvectorReg()
911 ByteVec = DAG.getNode(HexagonISD::VROR, dl, ByteTy, ByteVec, ByteIdx); in insertHvxSubvectorPred()
[all …]
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| D | HexagonISelLowering.h | 67 VROR, enumerator
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| D | HexagonISelDAGToDAG.cpp | 902 case HexagonISD::VROR: return SelectHvxRor(N); in Select()
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| D | HexagonISelLowering.cpp | 1722 case HexagonISD::VROR: return "HexagonISD::VROR"; in getTargetNodeName()
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