Searched refs:Vec64 (Results 1 – 5 of 5) sorted by relevance
/external/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 164 for (MVT Vec64 : { MVT::v2i64, MVT::v2f64 }) { in SITargetLowering() 165 setOperationAction(ISD::BUILD_VECTOR, Vec64, Promote); in SITargetLowering() 166 AddPromotedToType(ISD::BUILD_VECTOR, Vec64, MVT::v4i32); in SITargetLowering() 168 setOperationAction(ISD::EXTRACT_VECTOR_ELT, Vec64, Promote); in SITargetLowering() 169 AddPromotedToType(ISD::EXTRACT_VECTOR_ELT, Vec64, MVT::v4i32); in SITargetLowering() 171 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering() 172 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v4i32); in SITargetLowering() 174 setOperationAction(ISD::SCALAR_TO_VECTOR, Vec64, Promote); in SITargetLowering() 175 AddPromotedToType(ISD::SCALAR_TO_VECTOR, Vec64, MVT::v4i32); in SITargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.h | 332 SDValue contractPredicate(SDValue Vec64, const SDLoc &dl,
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D | HexagonISelLowering.cpp | 2474 HexagonTargetLowering::contractPredicate(SDValue Vec64, const SDLoc &dl, in contractPredicate() argument 2476 assert(ty(Vec64).getSizeInBits() == 64); in contractPredicate() 2477 if (isUndef(Vec64)) in contractPredicate() 2479 return getInstr(Hexagon::S2_vtrunehb, dl, MVT::i32, {Vec64}, DAG); in contractPredicate()
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D | HexagonISelLoweringHVX.cpp | 793 SDValue Vec64 = DAG.getNode(HexagonISD::COMBINE, dl, MVT::v8i8, {W1, W0}); in extractHvxSubvectorPred() local 795 {Vec64, DAG.getTargetConstant(0, dl, MVT::i32)}, DAG); in extractHvxSubvectorPred()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 273 for (MVT Vec64 : { MVT::v2i64, MVT::v2f64 }) { in SITargetLowering() 274 setOperationAction(ISD::BUILD_VECTOR, Vec64, Promote); in SITargetLowering() 275 AddPromotedToType(ISD::BUILD_VECTOR, Vec64, MVT::v4i32); in SITargetLowering() 277 setOperationAction(ISD::EXTRACT_VECTOR_ELT, Vec64, Promote); in SITargetLowering() 278 AddPromotedToType(ISD::EXTRACT_VECTOR_ELT, Vec64, MVT::v4i32); in SITargetLowering() 280 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering() 281 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v4i32); in SITargetLowering() 283 setOperationAction(ISD::SCALAR_TO_VECTOR, Vec64, Promote); in SITargetLowering() 284 AddPromotedToType(ISD::SCALAR_TO_VECTOR, Vec64, MVT::v4i32); in SITargetLowering()
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