Searched refs:WriteSeq (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 894 IdxVec WriteSeq; in GenSchedClassTables() local
895 SchedModels.expandRWSeqForProc(W, WriteSeq, /*IsRead=*/false, in GenSchedClassTables()
901 unsigned WriteID = WriteSeq.back(); in GenSchedClassTables()
911 for (unsigned WS : WriteSeq) { in GenSchedClassTables()
|
| D | CodeGenSchedule.cpp | 1350 IdxVec WriteSeq; in inferFromRW() local
1351 expandRWSequence(WriteIdx, WriteSeq, /*IsRead=*/false); in inferFromRW()
1355 for (IdxIter WI = WriteSeq.begin(), WE = WriteSeq.end(); WI != WE; ++WI) in inferFromRW()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 1074 IdxVec WriteSeq; in GenSchedClassTables() local
1075 SchedModels.expandRWSeqForProc(W, WriteSeq, /*IsRead=*/false, in GenSchedClassTables()
1081 unsigned WriteID = WriteSeq.back(); in GenSchedClassTables()
1091 for (unsigned WS : WriteSeq) { in GenSchedClassTables()
|
| D | CodeGenSchedule.cpp | 1427 IdxVec WriteSeq; in inferFromRW() local
1428 expandRWSequence(WriteIdx, WriteSeq, /*IsRead=*/false); in inferFromRW()
1431 Seq.append(WriteSeq.begin(), WriteSeq.end()); in inferFromRW()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCScheduleP9.td | 365 // ***************** WriteSeq Definitions *****************
|