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/external/u-boot/arch/arm/dts/
Dhi6220.dtsi57 compatible = "arm,cortex-a53", "arm,armv8";
64 compatible = "arm,cortex-a53", "arm,armv8";
71 compatible = "arm,cortex-a53", "arm,armv8";
78 compatible = "arm,cortex-a53", "arm,armv8";
85 compatible = "arm,cortex-a53", "arm,armv8";
92 compatible = "arm,cortex-a53", "arm,armv8";
99 compatible = "arm,cortex-a53", "arm,armv8";
106 compatible = "arm,cortex-a53", "arm,armv8";
Dbcm2837.dtsi37 compatible = "arm,cortex-a53";
45 compatible = "arm,cortex-a53";
53 compatible = "arm,cortex-a53";
61 compatible = "arm,cortex-a53";
Dfsl-imx8-ca53.dtsi46 compatible = "arm,cortex-a53";
55 compatible = "arm,cortex-a53";
64 compatible = "arm,cortex-a53";
73 compatible = "arm,cortex-a53";
Dsun50i-h5.dtsi48 compatible = "arm,cortex-a53", "arm,armv8";
52 compatible = "arm,cortex-a53", "arm,armv8";
56 compatible = "arm,cortex-a53", "arm,armv8";
60 compatible = "arm,cortex-a53", "arm,armv8";
Dsocfpga_stratix10.dtsi20 compatible = "arm,cortex-a53", "arm,armv8";
27 compatible = "arm,cortex-a53", "arm,armv8";
34 compatible = "arm,cortex-a53", "arm,armv8";
41 compatible = "arm,cortex-a53", "arm,armv8";
Dhi3798cv200.dtsi28 compatible = "arm,cortex-a53";
35 compatible = "arm,cortex-a53";
42 compatible = "arm,cortex-a53";
49 compatible = "arm,cortex-a53";
Duniphier-pxs3.dtsi42 compatible = "arm,cortex-a53", "arm,armv8";
51 compatible = "arm,cortex-a53", "arm,armv8";
60 compatible = "arm,cortex-a53", "arm,armv8";
69 compatible = "arm,cortex-a53", "arm,armv8";
Dmeson-gx.dtsi53 compatible = "arm,cortex-a53", "arm,armv8";
62 compatible = "arm,cortex-a53", "arm,armv8";
71 compatible = "arm,cortex-a53", "arm,armv8";
80 compatible = "arm,cortex-a53", "arm,armv8";
93 compatible = "arm,cortex-a53-pmu";
Drk3368.dtsi125 compatible = "arm,cortex-a53", "arm,armv8";
135 compatible = "arm,cortex-a53", "arm,armv8";
143 compatible = "arm,cortex-a53", "arm,armv8";
151 compatible = "arm,cortex-a53", "arm,armv8";
159 compatible = "arm,cortex-a53", "arm,armv8";
169 compatible = "arm,cortex-a53", "arm,armv8";
177 compatible = "arm,cortex-a53", "arm,armv8";
185 compatible = "arm,cortex-a53", "arm,armv8";
Dsun50i-a64.dtsi59 compatible = "arm,cortex-a53", "arm,armv8";
66 compatible = "arm,cortex-a53", "arm,armv8";
73 compatible = "arm,cortex-a53", "arm,armv8";
80 compatible = "arm,cortex-a53", "arm,armv8";
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dpostra-mi-sched.ll1 ; RUN: llc < %s -O3 -mtriple=aarch64-eabi -mcpu=cortex-a53 | FileCheck %s
3 ; With cortex-a53, each of fmul and fcvt have latency of 6 cycles. After the
Daarch64-fix-cortex-a53-835769.ll5 ; cases could break if instruction scheduling heuristics for cortex-a53 change
6 ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-fix-cortex-a53-835769=1 -stats 2>&1 \
8 ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-fix-cortex-a53-835769=0 -stats 2>&1 \
16 ; RUN: llc < %s -mcpu=cortex-a53 | FileCheck %s --check-prefix CHECK-BASIC-PASS-DISABLED
534 ; CHECK: 11 aarch64-fix-cortex-a53-835769 - Number of Nops added to work around erratum 835769
Darm64-misched-forwarding-A53.ll2 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -ver…
Darm64-triv-disjoint-mem-access.ll1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -enable-aa-sched-mi | FileCheck %s
Darm64-misched-basic-A53.ll2 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -ver…
3 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -ver…
115 ; [ARM64] Cortex-a53 schedule mode can't handle NEON post-increment load
/external/llvm/test/CodeGen/AArch64/
Dpostra-mi-sched.ll1 ; RUN: llc < %s -O3 -march=aarch64 -mcpu=cortex-a53 | FileCheck %s
3 ; With cortex-a53, each of fmul and fcvt have latency of 6 cycles. After the
Daarch64-fix-cortex-a53-835769.ll5 ; cases could break if instruction scheduling heuristics for cortex-a53 change
6 ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-fix-cortex-a53-835769=1 -stats 2>&1 \
8 ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-fix-cortex-a53-835769=0 -stats 2>&1 \
16 ; RUN: llc < %s -mcpu=cortex-a53 | FileCheck %s --check-prefix CHECK-BASIC-PASS-DISABLED
534 ; CHECK: 11 aarch64-fix-cortex-a53-835769 - Number of Nops added to work around erratum 835769
Darm64-misched-forwarding-A53.ll2 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -ver…
Darm64-triv-disjoint-mem-access.ll1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -enable-aa-sched-mi | FileCheck %s
Dremat.ll3 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a53 -o - %s | FileCheck %s
Dcpus.ll6 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s
Darm64-misched-basic-A53.ll2 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -ver…
3 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -ver…
115 ; [ARM64] Cortex-a53 schedule mode can't handle NEON post-increment load
/external/u-boot/tools/
Dzynqmpbif.c122 char a53[] = "a53-X"; in parse_dest_cpu() local
124 a53[4] = dest_cpus[i][4]; in parse_dest_cpu()
125 if (!strncmp(line, a53, strlen(a53))) { in parse_dest_cpu()
127 return line + strlen(a53); in parse_dest_cpu()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/CorrelatedValuePropagation/
Dcrash.ll118 %a53 = and i1 %a52, %a52
119 %a54 = and i1 %a53, %a53
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dlsr-scale-addr-mode.ll4 ; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a53 %s -o - | FileCheck %s -check-prefix CHECK-NONEGOFF

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