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/external/u-boot/arch/arm/mach-sunxi/
Dclock_sun4i.c121 int axi, ahb, apb0; in clock_set_pll1() local
135 ahb = DIV_ROUND_UP(hz/axi, 204000000); /* Max 250MHz */ in clock_set_pll1()
138 printf("CPU: %uHz, AXI/AHB/APB: %d/%d/%d\n", hz, axi, ahb, apb0); in clock_set_pll1()
142 if (ahb > 4) in clock_set_pll1()
143 ahb = 3; in clock_set_pll1()
144 else if (ahb > 2) in clock_set_pll1()
145 ahb = 2; in clock_set_pll1()
146 else if (ahb > 1) in clock_set_pll1()
147 ahb = 1; in clock_set_pll1()
149 ahb = 0; in clock_set_pll1()
[all …]
/external/u-boot/arch/arm/dts/
Dsun5i-gr8.dtsi199 ahb: ahb@01c20054 { label
201 compatible = "allwinner,sun5i-a13-ahb-clk";
204 clock-output-names = "ahb";
209 assigned-clocks = <&ahb>;
217 clocks = <&ahb>;
240 compatible = "allwinner,sun5i-a13-ahb-gates-clk";
242 clocks = <&ahb>;
540 clock-names = "ahb", "mod";
553 clock-names = "ahb", "mod";
567 clock-names = "ahb", "mod";
[all …]
Dsun5i.dtsi199 ahb: ahb@01c20054 { label
201 compatible = "allwinner,sun5i-a13-ahb-clk";
204 clock-output-names = "ahb";
209 assigned-clocks = <&ahb>;
217 clocks = <&ahb>;
407 clock-names = "ahb", "mod";
421 clock-names = "ahb", "mod";
437 clock-names = "ahb",
454 clock-names = "ahb",
471 clock-names = "ahb",
[all …]
Dsun8i-v3s.dtsi106 clock-names = "ahb",
111 reset-names = "ahb";
125 clock-names = "ahb",
130 reset-names = "ahb";
144 clock-names = "ahb",
149 reset-names = "ahb";
Dsun4i-a10.dtsi308 ahb: ahb@01c20054 { label
310 compatible = "allwinner,sun4i-a10-ahb-clk";
313 clock-output-names = "ahb";
318 compatible = "allwinner,sun4i-a10-ahb-gates-clk";
320 clocks = <&ahb>;
357 clocks = <&ahb>;
729 clock-names = "ahb", "mod";
742 clock-names = "ahb", "mod";
756 clock-names = "ahb", "mod";
789 clock-names = "ahb",
[all …]
Dsun9i-a80.dtsi219 compatible = "allwinner,sun9i-a80-ahb-clk";
227 compatible = "allwinner,sun9i-a80-ahb-clk";
235 compatible = "allwinner,sun9i-a80-ahb-clk";
550 clock-names = "ahb", "mmc", "output", "sample";
552 reset-names = "ahb";
564 clock-names = "ahb", "mmc", "output", "sample";
566 reset-names = "ahb";
578 clock-names = "ahb", "mmc", "output", "sample";
580 reset-names = "ahb";
592 clock-names = "ahb", "mmc", "output", "sample";
[all …]
Dsun6i-a31.dtsi479 clock-names = "ahb",
484 reset-names = "ahb";
499 clock-names = "ahb",
504 reset-names = "ahb";
519 clock-names = "ahb",
524 reset-names = "ahb";
539 clock-names = "ahb",
544 reset-names = "ahb";
961 clock-names = "ahb", "mod";
963 reset-names = "ahb";
[all …]
Dsun8i-a33.dtsi213 clock-names = "ahb",
248 clock-names = "ahb", "mod";
250 reset-names = "ahb";
289 clock-names = "ahb", "mod",
318 clock-names = "ahb", "mod",
359 clock-names = "ahb", "mod", "ram";
Dsun5i-a13.dtsi105 compatible = "allwinner,sun5i-a13-ahb-gates-clk";
107 clocks = <&ahb>;
225 clock-names = "ahb",
268 clock-names = "ahb", "mod",
295 clock-names = "ahb", "mod",
Dsun8i-a23-a33.dtsi143 clock-names = "ahb",
148 reset-names = "ahb";
162 clock-names = "ahb",
167 reset-names = "ahb";
181 clock-names = "ahb",
186 reset-names = "ahb";
198 clock-names = "ahb", "mod";
200 reset-names = "ahb";
Dsun50i-h5.dtsi87 clock-names = "ahb", "mmc";
94 clock-names = "ahb", "mmc";
101 clock-names = "ahb", "mmc";
Dsun50i-a64.dtsi136 clock-names = "ahb", "mmc";
138 reset-names = "ahb";
150 clock-names = "ahb", "mmc";
152 reset-names = "ahb";
164 clock-names = "ahb", "mmc";
166 reset-names = "ahb";
Dsun7i-a20.dtsi309 ahb: ahb@01c20054 { label
311 compatible = "allwinner,sun5i-a13-ahb-clk";
314 clock-output-names = "ahb";
319 assigned-clocks = <&ahb>;
325 compatible = "allwinner,sun7i-a20-ahb-gates-clk";
327 clocks = <&ahb>;
360 clocks = <&ahb>;
854 clock-names = "ahb", "mod";
867 clock-names = "ahb", "mod";
881 clock-names = "ahb", "mod";
[all …]
Dimx6sl.dtsi718 clock-names = "ipg", "ahb";
768 ahb-burst-config = <0x0>;
781 ahb-burst-config = <0x0>;
794 ahb-burst-config = <0x0>;
813 clock-names = "ipg", "ahb";
824 clock-names = "ipg", "ahb", "per";
836 clock-names = "ipg", "ahb", "per";
848 clock-names = "ipg", "ahb", "per";
860 clock-names = "ipg", "ahb", "per";
Dimx6qdl.dtsi426 clock-names = "per", "ahb";
880 clock-names = "ipg", "ahb";
930 ahb-burst-config = <0x0>;
944 ahb-burst-config = <0x0>;
957 ahb-burst-config = <0x0>;
970 ahb-burst-config = <0x0>;
992 clock-names = "ipg", "ahb", "ptp";
1010 clock-names = "ipg", "ahb", "per";
1022 clock-names = "ipg", "ahb", "per";
1034 clock-names = "ipg", "ahb", "per";
[all …]
Dsun8i-h3.dtsi170 clock-names = "ahb",
175 reset-names = "ahb";
190 clock-names = "ahb",
195 reset-names = "ahb";
210 clock-names = "ahb",
215 reset-names = "ahb";
Dimx6sll.dtsi149 "ahb", "ocram", "periph2", "periph2_pre", "periph2_clk2", "periph2_clk2_sel",
637 clock-names = "ipg", "ahb";
701 ahb-burst-config = <0x0>;
715 ahb-burst-config = <0x0>;
735 clock-names = "ipg", "ahb", "per";
749 clock-names = "ipg", "ahb", "per";
763 clock-names = "ipg", "ahb", "per";
Dimx6sx.dtsi756 clock-names = "ipg", "ahb";
805 ahb-burst-config = <0x0>;
818 ahb-burst-config = <0x0>;
833 ahb-burst-config = <0x0>;
856 clock-names = "ipg", "ahb", "ptp",
879 clock-names = "ipg", "ahb", "per";
891 clock-names = "ipg", "ahb", "per";
903 clock-names = "ipg", "ahb", "per";
915 clock-names = "ipg", "ahb", "per";
965 clock-names = "ipg", "ahb", "ptp",
Dat91sam9g15ek.dts18 ahb {
Dimx7ulp.dtsi128 ahbbridge0: ahb-bridge0@40000000 {
297 ahb-burst-config = <0x0>;
326 clock-names ="ipg", "ahb", "per";
340 clock-names ="ipg", "ahb", "per";
403 ahbbridge1: ahb-bridge1@40800000 {
Dat91sam9g15.dtsi16 ahb {
Dat91sam9x25ek.dts17 ahb {
Dat91sam9x35ek.dts18 ahb {
/external/skia/src/gpu/
DGrAHardwareBufferImageGenerator.cpp133 AutoAHBRelease(AHardwareBuffer* ahb) : fAhb(ahb) {} in makeProxy() argument
/external/u-boot/arch/mips/mach-ath79/qca953x/
Dlowlevel_init.S64 #define MK_PLL_CLK_CTRL(cpu, ddr, ahb) \ argument
67 PLL_CLK_CTRL_AHB_DIV(ahb))

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