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Searched refs:alu_out (Results 1 – 10 of 10) sorted by relevance

/external/v8/src/s390/
Dsimulator-s390.cc1783 bool Simulator::OverflowFromSigned(T1 alu_out, T1 left, T1 right, in OverflowFromSigned() argument
1790 && ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0)); in OverflowFromSigned()
1795 && ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0)); in OverflowFromSigned()
3136 uint32_t alu_out = 0; in EVALUATE() local
3138 alu_out = (r3_val << shiftBits) | (rotateBits); in EVALUATE()
3139 set_low_register(r1, alu_out); in EVALUATE()
3456 uint32_t alu_out = 0; in EVALUATE() local
3458 alu_out = r1_val + r2_val; in EVALUATE()
3460 set_low_register(r1, alu_out); in EVALUATE()
3461 SetS390ConditionCodeCarry<uint32_t>(alu_out, isOF); in EVALUATE()
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Dsimulator-s390.h218 inline bool OverflowFromSigned(T1 alu_out, T1 left, T1 right, bool addition);
/external/v8/src/ppc/
Dsimulator-ppc.cc1135 bool Simulator::OverflowFrom(int32_t alu_out, int32_t left, int32_t right, in OverflowFrom() argument
1143 ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0)); in OverflowFrom()
1149 ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0)); in OverflowFrom()
1634 intptr_t alu_out = im_val - ra_val; in ExecuteGeneric() local
1635 set_register(rt, alu_out); in ExecuteGeneric()
1721 uintptr_t alu_out = ra_val + im_val; in ExecuteGeneric() local
1728 set_register(rt, alu_out); in ExecuteGeneric()
1735 intptr_t alu_out; in ExecuteGeneric() local
1737 alu_out = im_val; in ExecuteGeneric()
1740 alu_out = ra_val + im_val; in ExecuteGeneric()
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Dsimulator-ppc.h222 bool OverflowFrom(int32_t alu_out, int32_t left, int32_t right,
/external/v8/src/mips64/
Dsimulator-mips64.h428 inline void SetResult(const int32_t rd_reg, const int64_t alu_out) { in SetResult() argument
429 set_register(rd_reg, alu_out); in SetResult()
430 TraceRegWr(alu_out); in SetResult()
433 inline void SetFPUWordResult(int32_t fd_reg, int32_t alu_out) { in SetFPUWordResult() argument
434 set_fpu_register_word(fd_reg, alu_out); in SetFPUWordResult()
438 inline void SetFPUWordResult2(int32_t fd_reg, int32_t alu_out) { in SetFPUWordResult2() argument
439 set_fpu_register_word(fd_reg, alu_out); in SetFPUWordResult2()
443 inline void SetFPUResult(int32_t fd_reg, int64_t alu_out) { in SetFPUResult() argument
444 set_fpu_register(fd_reg, alu_out); in SetFPUResult()
448 inline void SetFPUResult2(int32_t fd_reg, int64_t alu_out) { in SetFPUResult2() argument
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Dsimulator-mips64.cc3361 int64_t alu_out = 0x12345678; in DecodeTypeRegisterWRsType() local
3364 alu_out = get_fpu_register_signed_word(fs_reg()); in DecodeTypeRegisterWRsType()
3365 SetFPUFloatResult(fd_reg(), static_cast<float>(alu_out)); in DecodeTypeRegisterWRsType()
3368 alu_out = get_fpu_register_signed_word(fs_reg()); in DecodeTypeRegisterWRsType()
3369 SetFPUDoubleResult(fd_reg(), static_cast<double>(alu_out)); in DecodeTypeRegisterWRsType()
3656 int64_t alu_out; in DecodeTypeRegisterSPECIAL() local
3704 alu_out = static_cast<int32_t>(static_cast<uint32_t>(rt_u()) >> sa()); in DecodeTypeRegisterSPECIAL()
3709 alu_out = static_cast<int32_t>( in DecodeTypeRegisterSPECIAL()
3715 SetResult(rd_reg(), alu_out); in DecodeTypeRegisterSPECIAL()
3722 alu_out = static_cast<int64_t>(rt_u() >> sa()); in DecodeTypeRegisterSPECIAL()
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/external/v8/src/mips/
Dsimulator-mips.h416 inline void SetResult(int32_t rd_reg, int32_t alu_out) { in SetResult() argument
417 set_register(rd_reg, alu_out); in SetResult()
418 TraceRegWr(alu_out); in SetResult()
421 inline void SetFPUWordResult(int32_t fd_reg, int32_t alu_out) { in SetFPUWordResult() argument
422 set_fpu_register_word(fd_reg, alu_out); in SetFPUWordResult()
426 inline void SetFPUResult(int32_t fd_reg, int64_t alu_out) { in SetFPUResult() argument
427 set_fpu_register(fd_reg, alu_out); in SetFPUResult()
431 inline void SetFPUFloatResult(int32_t fd_reg, float alu_out) { in SetFPUFloatResult() argument
432 set_fpu_register_float(fd_reg, alu_out); in SetFPUFloatResult()
436 inline void SetFPUDoubleResult(int32_t fd_reg, double alu_out) { in SetFPUDoubleResult() argument
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Dsimulator-mips.cc3068 int32_t alu_out = 0x12345678; in DecodeTypeRegisterWRsType() local
3071 alu_out = get_fpu_register_signed_word(fs_reg()); in DecodeTypeRegisterWRsType()
3072 SetFPUFloatResult(fd_reg(), static_cast<float>(alu_out)); in DecodeTypeRegisterWRsType()
3075 alu_out = get_fpu_register_signed_word(fs_reg()); in DecodeTypeRegisterWRsType()
3076 SetFPUDoubleResult(fd_reg(), static_cast<double>(alu_out)); in DecodeTypeRegisterWRsType()
3779 int64_t alu_out = 0x12345678; in DecodeTypeRegisterSPECIAL() local
3816 alu_out = rt() << sa(); in DecodeTypeRegisterSPECIAL()
3817 SetResult(rd_reg(), static_cast<int32_t>(alu_out)); in DecodeTypeRegisterSPECIAL()
3823 alu_out = rt_u() >> sa(); in DecodeTypeRegisterSPECIAL()
3828 alu_out = base::bits::RotateRight32(rt_u(), sa()); in DecodeTypeRegisterSPECIAL()
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/external/v8/src/arm/
Dsimulator-arm.cc1223 bool Simulator::OverflowFrom(int32_t alu_out, in OverflowFrom() argument
1230 && ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0)); in OverflowFrom()
1235 && ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0)); in OverflowFrom()
2005 int32_t alu_out = rm_val * rs_val; in DecodeType01() local
2006 set_register(rd, alu_out); in DecodeType01()
2008 SetNZFlags(alu_out); in DecodeType01()
2365 int32_t alu_out; in DecodeType01() local
2371 alu_out = rn_val & shifter_operand; in DecodeType01()
2372 set_register(rd, alu_out); in DecodeType01()
2374 SetNZFlags(alu_out); in DecodeType01()
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Dsimulator-arm.h230 bool OverflowFrom(int32_t alu_out,