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Searched refs:anv_address (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/intel/vulkan/
DgenX_query.c306 pc.Address = (struct anv_address) { bo, offset }; in emit_ps_depth_count()
320 pc.Address = (struct anv_address) { bo, offset }; in emit_query_availability()
360 sdm.Address = (struct anv_address) { in genX()
395 lrm.MemoryAddress = (struct anv_address) { bo, offset }; in emit_pipeline_stat()
399 lrm.MemoryAddress = (struct anv_address) { bo, offset + 4 }; in emit_pipeline_stat()
510 srm.MemoryAddress = (struct anv_address) { &pool->bo, offset + 8 }; in genX()
514 srm.MemoryAddress = (struct anv_address) { &pool->bo, offset + 12 }; in genX()
523 pc.Address = (struct anv_address) { &pool->bo, offset + 8 }; in genX()
574 lrm.MemoryAddress = (struct anv_address) { bo, offset }; in emit_load_alu_reg_u64()
578 lrm.MemoryAddress = (struct anv_address) { bo, offset + 4 }; in emit_load_alu_reg_u64()
[all …]
DgenX_gpu_memcpy.c66 const struct anv_address src_addr = in genX()
67 (struct anv_address) { src, src_offset + i}; in genX()
68 const struct anv_address dst_addr = in genX()
69 (struct anv_address) { dst, dst_offset + i}; in genX()
201 sob.SurfaceBaseAddress = (struct anv_address) { dst, dst_offset }; in genX()
Dgen8_cmd_buffer.c570 (struct anv_address) { buffer->bo, buffer->offset + offset }; in genX()
612 pc.Address = (struct anv_address) { in genX()
636 pc.Address = (struct anv_address) { in genX()
665 sem.SemaphoreAddress = (struct anv_address) { in genX()
DgenX_cmd_buffer.c41 lrm.MemoryAddress = (struct anv_address) { bo, offset }; in emit_lrm()
84 sba.GeneralStateBaseAddress = (struct anv_address) { NULL, 0 }; in genX()
94 (struct anv_address) { &device->dynamic_state_pool.block_pool.bo, 0 }; in genX()
98 sba.IndirectObjectBaseAddress = (struct anv_address) { NULL, 0 }; in genX()
103 (struct anv_address) { &device->instruction_state_pool.block_pool.bo, 0 }; in genX()
443 const struct anv_address resolve_flag_addr = in genX()
495 struct anv_address addr = in init_fast_clear_state_entry()
548 const struct anv_address entry_addr = in genX()
1989 struct anv_address read_addr; in cmd_buffer_flush_push_constants()
1994 read_addr = (struct anv_address) { in cmd_buffer_flush_push_constants()
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Dgen7_cmd_buffer.c251 (struct anv_address) { buffer->bo, buffer->offset + offset }; in genX()
253 (struct anv_address) { buffer->bo, buffer->offset + buffer->size }; in genX()
Danv_private.h1032 struct anv_address { struct
1039 const struct anv_address address, uint32_t delta) in _anv_combine_address() argument
1050 #define __gen_address_type struct anv_address
1719 struct anv_address num_workgroups;
1874 struct anv_address
2528 static inline struct anv_address
2535 return (struct anv_address) { in anv_image_get_clear_color_addr()
2543 static inline struct anv_address
2549 struct anv_address addr = in anv_image_get_needs_resolve_addr()
Danv_batch_chain.c450 struct anv_address
454 return (struct anv_address) { in anv_cmd_buffer_surface_base_address()
485 bbs.BatchBufferStartAddress = (struct anv_address) { bo, offset }; in emit_batch_buffer_start()
DgenX_pipeline.c271 pc.Address = (struct anv_address) { &device->workaround_bo, 0 }; in genX()
1099 static struct anv_address
1104 return (struct anv_address) {
Danv_blorp.c179 anv_to_blorp_address(struct anv_address addr) in anv_to_blorp_address()