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Searched refs:anv_batch (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/intel/vulkan/
DgenX_query.c569 emit_load_alu_reg_u64(struct anv_batch *batch, uint32_t reg, in emit_load_alu_reg_u64()
583 emit_load_alu_reg_imm32(struct anv_batch *batch, uint32_t reg, uint32_t imm) in emit_load_alu_reg_imm32()
592 emit_load_alu_reg_imm64(struct anv_batch *batch, uint32_t reg, uint64_t imm) in emit_load_alu_reg_imm64()
599 emit_load_alu_reg_reg32(struct anv_batch *batch, uint32_t src, uint32_t dst) in emit_load_alu_reg_reg32()
611 keep_gpr0_lower_n_bits(struct anv_batch *batch, uint32_t n) in keep_gpr0_lower_n_bits()
632 shl_gpr0_by_30_bits(struct anv_batch *batch) in shl_gpr0_by_30_bits()
669 shr_gpr0_by_2_bits(struct anv_batch *batch) in shr_gpr0_by_2_bits()
677 gpu_write_query_result(struct anv_batch *batch, in gpu_write_query_result()
707 compute_query_result(struct anv_batch *batch, uint32_t dst_reg, in compute_query_result()
Danv_batch_chain.c196 anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords) in anv_batch_emit_dwords()
215 anv_batch_emit_reloc(struct anv_batch *batch, in anv_batch_emit_reloc()
229 anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other) in anv_batch_emit_batch()
334 anv_batch_bo_start(struct anv_batch_bo *bbo, struct anv_batch *batch, in anv_batch_bo_start()
344 anv_batch_bo_continue(struct anv_batch_bo *bbo, struct anv_batch *batch, in anv_batch_bo_continue()
354 anv_batch_bo_finish(struct anv_batch_bo *bbo, struct anv_batch *batch) in anv_batch_bo_finish()
363 struct anv_batch *batch, size_t aditional, in anv_batch_bo_grow()
493 struct anv_batch *batch = &cmd_buffer->batch; in cmd_buffer_chain_to_batch_bo()
510 anv_cmd_buffer_chain_batch(struct anv_batch *batch, void *_data) in anv_cmd_buffer_chain_batch()
536 anv_cmd_buffer_grow_batch(struct anv_batch *batch, void *_data) in anv_cmd_buffer_grow_batch()
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DgenX_state.c46 gen10_emit_wa_cs_stall_flush(struct anv_batch *batch) in gen10_emit_wa_cs_stall_flush()
64 gen10_emit_wa_lri_to_cache_mode_zero(struct anv_batch *batch) in gen10_emit_wa_lri_to_cache_mode_zero()
97 struct anv_batch batch; in genX()
Danv_private.h985 struct anv_batch { struct
997 VkResult (*extend_cb)(struct anv_batch *, void *); argument
1010 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords); argument
1011 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
1012 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
1015 struct anv_batch *batch);
1018 anv_batch_set_error(struct anv_batch *batch, VkResult error) in anv_batch_set_error()
1027 anv_batch_has_error(struct anv_batch *batch) in anv_batch_has_error()
1038 _anv_combine_address(struct anv_batch *batch, void *location, in _anv_combine_address()
1051 #define __gen_user_data struct anv_batch
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Danv_genX.h62 genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
DgenX_cmd_buffer.c36 emit_lrm(struct anv_batch *batch, in emit_lrm()
46 emit_lri(struct anv_batch *batch, uint32_t reg, uint32_t imm) in emit_lri()
56 emit_lrr(struct anv_batch *batch, uint32_t dst, uint32_t src) in emit_lrr()
2404 emit_mul_gpr0(struct anv_batch *batch, uint32_t N) in emit_mul_gpr0()
2420 struct anv_batch *batch = &cmd_buffer->batch; in load_indirect_parameters()
2717 struct anv_batch *batch = &cmd_buffer->batch; in genX()
Danv_queue.c60 struct anv_batch *batch) in anv_device_submit_simple_batch()
Danv_device.c1243 struct anv_batch batch = { in anv_device_init_trivial_batch()
1701 struct anv_batch batch; in anv_DeviceWaitIdle()
DgenX_pipeline.c236 genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch, in genX()