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/external/mesa3d/src/gallium/drivers/freedreno/
Dfreedreno_batch.c39 batch_init(struct fd_batch *batch) in batch_init() argument
41 struct fd_context *ctx = batch->ctx; in batch_init()
45 util_queue_fence_init(&batch->flush_fence); in batch_init()
57 batch->draw = fd_ringbuffer_new(ctx->pipe, size); in batch_init()
58 if (!batch->nondraw) { in batch_init()
59 batch->binning = fd_ringbuffer_new(ctx->pipe, size); in batch_init()
60 batch->gmem = fd_ringbuffer_new(ctx->pipe, size); in batch_init()
62 fd_ringbuffer_set_parent(batch->gmem, NULL); in batch_init()
63 fd_ringbuffer_set_parent(batch->draw, batch->gmem); in batch_init()
64 fd_ringbuffer_set_parent(batch->binning, batch->gmem); in batch_init()
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Dfreedreno_query_hw.c44 get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring, in get_sample() argument
47 struct fd_context *ctx = batch->ctx; in get_sample()
53 if (!batch->sample_cache[idx]) { in get_sample()
55 ctx->hw_sample_providers[idx]->get_sample(batch, ring); in get_sample()
56 fd_hw_sample_reference(ctx, &batch->sample_cache[idx], new_samp); in get_sample()
57 util_dynarray_append(&batch->samples, struct fd_hw_sample *, new_samp); in get_sample()
58 batch->needs_flush = true; in get_sample()
61 fd_hw_sample_reference(ctx, &samp, batch->sample_cache[idx]); in get_sample()
67 clear_sample_cache(struct fd_batch *batch) in clear_sample_cache() argument
71 for (i = 0; i < ARRAY_SIZE(batch->sample_cache); i++) in clear_sample_cache()
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Dfreedreno_draw.c46 resource_read(struct fd_batch *batch, struct pipe_resource *prsc) in resource_read() argument
50 fd_batch_resource_used(batch, fd_resource(prsc), false); in resource_read()
54 resource_written(struct fd_batch *batch, struct pipe_resource *prsc) in resource_written() argument
58 fd_batch_resource_used(batch, fd_resource(prsc), true); in resource_written()
65 struct fd_batch *batch = ctx->batch; in fd_draw_vbo() local
66 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in fd_draw_vbo()
121 fd_batch_reset(batch); in fd_draw_vbo()
125 batch->blit = ctx->in_blit; in fd_draw_vbo()
126 batch->back_blit = ctx->in_shadow; in fd_draw_vbo()
131 fd_batch_set_stage(batch, FD_STAGE_DRAW); in fd_draw_vbo()
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Dfreedreno_gmem.c107 calculate_tiles(struct fd_batch *batch) in calculate_tiles() argument
109 struct fd_context *ctx = batch->ctx; in calculate_tiles()
111 struct pipe_scissor_state *scissor = &batch->max_scissor; in calculate_tiles()
112 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in calculate_tiles()
124 bool has_zs = !!(batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)); in calculate_tiles()
314 render_tiles(struct fd_batch *batch) in render_tiles() argument
316 struct fd_context *ctx = batch->ctx; in render_tiles()
320 ctx->emit_tile_init(batch); in render_tiles()
322 if (batch->restore) in render_tiles()
331 ctx->emit_tile_prep(batch, tile); in render_tiles()
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Dfreedreno_batch_cache.c136 struct fd_batch *batch = NULL; in fd_bc_flush() local
138 fd_batch_reference_locked(&batch, (struct fd_batch *)entry->data); in fd_bc_flush()
139 if (batch->ctx == ctx) { in fd_bc_flush()
141 fd_batch_reference(&last_batch, batch); in fd_bc_flush()
142 fd_batch_flush(batch, false, false); in fd_bc_flush()
145 fd_batch_reference_locked(&batch, NULL); in fd_bc_flush()
164 struct fd_batch *current_batch = ctx->batch; in fd_bc_flush_deferred()
170 struct fd_batch *batch = entry->data; in fd_bc_flush_deferred() local
171 if (batch == current_batch) in fd_bc_flush_deferred()
173 if (batch->ctx == ctx) in fd_bc_flush_deferred()
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Dfreedreno_batch.h209 void fd_batch_reset(struct fd_batch *batch);
210 void fd_batch_sync(struct fd_batch *batch);
211 void fd_batch_flush(struct fd_batch *batch, bool sync, bool force);
212 void fd_batch_add_dep(struct fd_batch *batch, struct fd_batch *dep);
213 void fd_batch_resource_used(struct fd_batch *batch, struct fd_resource *rsc, bool write);
214 void fd_batch_check_size(struct fd_batch *batch);
217 void __fd_batch_describe(char* buf, const struct fd_batch *batch);
218 void __fd_batch_destroy(struct fd_batch *batch);
232 fd_batch_reference(struct fd_batch **ptr, struct fd_batch *batch) in fd_batch_reference() argument
235 if (pipe_reference_described(&(*ptr)->reference, &batch->reference, in fd_batch_reference()
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Dfreedreno_fence.c43 struct fd_batch *batch; member
52 if (fence->batch) in fence_flush()
53 fd_batch_flush(fence->batch, true, true); in fence_flush()
54 debug_assert(!fence->batch); in fence_flush()
60 if (!fence->batch) in fd_fence_populate()
64 fence->batch = NULL; in fd_fence_populate()
103 struct fd_batch *batch, uint32_t timestamp, int fence_fd) in fence_create() argument
113 fence->batch = batch; in fence_create()
132 struct fd_batch *batch = ctx->batch; in fd_fence_server_sync() local
136 if (sync_accumulate("freedreno", &batch->in_fence_fd, fence->fence_fd)) { in fd_fence_server_sync()
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/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_batchbuffer.c83 struct intel_batchbuffer *batch = &brw->batch; in intel_batchbuffer_init() local
86 batch->use_shadow_copy = !devinfo->has_llc; in intel_batchbuffer_init()
88 if (batch->use_shadow_copy) { in intel_batchbuffer_init()
89 batch->batch.map = malloc(BATCH_SZ); in intel_batchbuffer_init()
90 batch->map_next = batch->batch.map; in intel_batchbuffer_init()
91 batch->state.map = malloc(STATE_SZ); in intel_batchbuffer_init()
94 init_reloc_list(&batch->batch_relocs, 250); in intel_batchbuffer_init()
95 init_reloc_list(&batch->state_relocs, 250); in intel_batchbuffer_init()
97 batch->exec_count = 0; in intel_batchbuffer_init()
98 batch->exec_array_size = 100; in intel_batchbuffer_init()
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DgenX_blorp_exec.c42 blorp_emit_dwords(struct blorp_batch *batch, unsigned n) in blorp_emit_dwords() argument
44 assert(batch->blorp->driver_ctx == batch->driver_batch); in blorp_emit_dwords()
45 struct brw_context *brw = batch->driver_batch; in blorp_emit_dwords()
48 uint32_t *map = brw->batch.map_next; in blorp_emit_dwords()
49 brw->batch.map_next += n; in blorp_emit_dwords()
55 blorp_emit_reloc(struct blorp_batch *batch, in blorp_emit_reloc() argument
58 assert(batch->blorp->driver_ctx == batch->driver_batch); in blorp_emit_reloc()
59 struct brw_context *brw = batch->driver_batch; in blorp_emit_reloc()
62 if (GEN_GEN < 6 && brw_ptr_in_state_buffer(&brw->batch, location)) { in blorp_emit_reloc()
63 offset = (char *)location - (char *)brw->batch.state.map; in blorp_emit_reloc()
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Dgen4_blorp_exec.h25 dynamic_state_address(struct blorp_batch *batch, uint32_t offset) in dynamic_state_address() argument
27 assert(batch->blorp->driver_ctx == batch->driver_batch); in dynamic_state_address()
28 struct brw_context *brw = batch->driver_batch; in dynamic_state_address()
31 .buffer = brw->batch.state.bo, in dynamic_state_address()
37 instruction_state_address(struct blorp_batch *batch, uint32_t offset) in instruction_state_address() argument
39 assert(batch->blorp->driver_ctx == batch->driver_batch); in instruction_state_address()
40 struct brw_context *brw = batch->driver_batch; in instruction_state_address()
49 blorp_emit_vs_state(struct blorp_batch *batch, in blorp_emit_vs_state() argument
52 assert(batch->blorp->driver_ctx == batch->driver_batch); in blorp_emit_vs_state()
53 struct brw_context *brw = batch->driver_batch; in blorp_emit_vs_state()
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Dintel_batchbuffer.h25 void intel_batchbuffer_free(struct intel_batchbuffer *batch);
52 bool brw_batch_references(struct intel_batchbuffer *batch, struct brw_bo *bo);
56 uint64_t brw_batch_reloc(struct intel_batchbuffer *batch,
61 uint64_t brw_state_reloc(struct intel_batchbuffer *batch,
68 ((uintptr_t)((_batch).map_next - (_batch).batch.map))
87 brw->batch.emit = USED_BATCH(brw->batch); in intel_batchbuffer_begin()
88 brw->batch.total = n; in intel_batchbuffer_begin()
96 struct intel_batchbuffer *batch = &brw->batch; in intel_batchbuffer_advance() local
97 unsigned int _n = USED_BATCH(*batch) - batch->emit; in intel_batchbuffer_advance()
98 assert(batch->total != 0); in intel_batchbuffer_advance()
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/external/tensorflow/tensorflow/core/kernels/batching_util/
Dbatch_scheduler_test.cc41 Batch<FakeTask> batch; in TEST() local
43 EXPECT_EQ(0, batch.num_tasks()); in TEST()
44 EXPECT_TRUE(batch.empty()); in TEST()
45 EXPECT_EQ(0, batch.size()); in TEST()
46 EXPECT_FALSE(batch.IsClosed()); in TEST()
49 batch.AddTask(std::unique_ptr<FakeTask>(task0)); in TEST()
51 EXPECT_EQ(1, batch.num_tasks()); in TEST()
52 EXPECT_FALSE(batch.empty()); in TEST()
53 EXPECT_EQ(task0->size(), batch.size()); in TEST()
54 EXPECT_EQ(task0->size(), batch.task(0).size()); in TEST()
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/external/mesa3d/src/gallium/winsys/i915/drm/
Di915_drm_batchbuffer.c30 i915_drm_batchbuffer(struct i915_winsys_batchbuffer *batch) in i915_drm_batchbuffer() argument
32 return (struct i915_drm_batchbuffer *)batch; in i915_drm_batchbuffer()
36 i915_drm_batchbuffer_reset(struct i915_drm_batchbuffer *batch) in i915_drm_batchbuffer_reset() argument
38 struct i915_drm_winsys *idws = i915_drm_winsys(batch->base.iws); in i915_drm_batchbuffer_reset()
40 if (batch->bo) in i915_drm_batchbuffer_reset()
41 drm_intel_bo_unreference(batch->bo); in i915_drm_batchbuffer_reset()
42 batch->bo = drm_intel_bo_alloc(idws->gem_manager, in i915_drm_batchbuffer_reset()
44 batch->actual_size, in i915_drm_batchbuffer_reset()
47 memset(batch->base.map, 0, batch->actual_size); in i915_drm_batchbuffer_reset()
48 batch->base.ptr = batch->base.map; in i915_drm_batchbuffer_reset()
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/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_batchbuffer.c43 intel->batch.cpu_map = malloc(intel->maxBatchSize); in intel_batchbuffer_init()
44 intel->batch.map = intel->batch.cpu_map; in intel_batchbuffer_init()
50 if (intel->batch.last_bo != NULL) { in intel_batchbuffer_reset()
51 drm_intel_bo_unreference(intel->batch.last_bo); in intel_batchbuffer_reset()
52 intel->batch.last_bo = NULL; in intel_batchbuffer_reset()
54 intel->batch.last_bo = intel->batch.bo; in intel_batchbuffer_reset()
56 intel->batch.bo = drm_intel_bo_alloc(intel->bufmgr, "batchbuffer", in intel_batchbuffer_reset()
59 intel->batch.reserved_space = BATCH_RESERVED; in intel_batchbuffer_reset()
60 intel->batch.used = 0; in intel_batchbuffer_reset()
66 free(intel->batch.cpu_map); in intel_batchbuffer_free()
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/external/mesa3d/src/gallium/drivers/i915/
Di915_batchbuffer.h37 i915_winsys_batchbuffer_space(struct i915_winsys_batchbuffer *batch) in i915_winsys_batchbuffer_space() argument
39 return batch->size - (batch->ptr - batch->map); in i915_winsys_batchbuffer_space()
43 i915_winsys_batchbuffer_check(struct i915_winsys_batchbuffer *batch, in i915_winsys_batchbuffer_check() argument
46 return dwords * 4 <= i915_winsys_batchbuffer_space(batch); in i915_winsys_batchbuffer_check()
50 i915_winsys_batchbuffer_dword_unchecked(struct i915_winsys_batchbuffer *batch, in i915_winsys_batchbuffer_dword_unchecked() argument
53 *(unsigned *)batch->ptr = dword; in i915_winsys_batchbuffer_dword_unchecked()
54 batch->ptr += 4; in i915_winsys_batchbuffer_dword_unchecked()
58 i915_winsys_batchbuffer_float(struct i915_winsys_batchbuffer *batch, in i915_winsys_batchbuffer_float() argument
63 assert (i915_winsys_batchbuffer_space(batch) >= 4); in i915_winsys_batchbuffer_float()
64 i915_winsys_batchbuffer_dword_unchecked(batch, uif.ui); in i915_winsys_batchbuffer_float()
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/external/grpc-grpc/src/core/lib/transport/
Dmetadata_batch.cc56 static void assert_valid_callouts(grpc_metadata_batch* batch) { in assert_valid_callouts() argument
58 for (grpc_linked_mdelem* l = batch->list.head; l != nullptr; l = l->next) { in assert_valid_callouts()
63 GPR_ASSERT(batch->idx.array[callout_idx] == l); in assert_valid_callouts()
71 void grpc_metadata_batch_assert_ok(grpc_metadata_batch* batch) { in grpc_metadata_batch_assert_ok() argument
72 assert_valid_list(&batch->list); in grpc_metadata_batch_assert_ok()
76 void grpc_metadata_batch_init(grpc_metadata_batch* batch) { in grpc_metadata_batch_init() argument
77 memset(batch, 0, sizeof(*batch)); in grpc_metadata_batch_init()
78 batch->deadline = GRPC_MILLIS_INF_FUTURE; in grpc_metadata_batch_init()
81 void grpc_metadata_batch_destroy(grpc_metadata_batch* batch) { in grpc_metadata_batch_destroy() argument
83 for (l = batch->list.head; l; l = l->next) { in grpc_metadata_batch_destroy()
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/external/mesa3d/src/intel/blorp/
Dblorp_genX_exec.h48 blorp_emit_dwords(struct blorp_batch *batch, unsigned n);
51 blorp_emit_reloc(struct blorp_batch *batch,
55 blorp_alloc_dynamic_state(struct blorp_batch *batch,
60 blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size,
65 blorp_get_workaround_page(struct blorp_batch *batch);
69 blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries,
75 blorp_flush_range(struct blorp_batch *batch, void *start, size_t size);
78 blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset,
83 blorp_get_surface_base_address(struct blorp_batch *batch);
87 blorp_emit_urb_config(struct blorp_batch *batch,
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/external/mesa3d/src/intel/vulkan/
DgenX_blorp_exec.c38 blorp_emit_dwords(struct blorp_batch *batch, unsigned n) in blorp_emit_dwords() argument
40 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; in blorp_emit_dwords()
41 return anv_batch_emit_dwords(&cmd_buffer->batch, n); in blorp_emit_dwords()
45 blorp_emit_reloc(struct blorp_batch *batch, in blorp_emit_reloc() argument
48 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; in blorp_emit_reloc()
49 assert(cmd_buffer->batch.start <= location && in blorp_emit_reloc()
50 location < cmd_buffer->batch.end); in blorp_emit_reloc()
51 return anv_batch_emit_reloc(&cmd_buffer->batch, location, in blorp_emit_reloc()
56 blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset, in blorp_surface_reloc() argument
59 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; in blorp_surface_reloc()
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DgenX_gpu_memcpy.c71 anv_batch_emit(&cmd_buffer->batch, GENX(MI_COPY_MEM_MEM), cp) { in genX()
80 anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_MEM), load) { in genX()
84 anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), store) { in genX()
132 dw = anv_batch_emitn(&cmd_buffer->batch, 5, GENX(3DSTATE_VERTEX_BUFFERS)); in genX()
133 GENX(VERTEX_BUFFER_STATE_pack)(&cmd_buffer->batch, dw + 1, in genX()
148 dw = anv_batch_emitn(&cmd_buffer->batch, 3, GENX(3DSTATE_VERTEX_ELEMENTS)); in genX()
149 GENX(VERTEX_ELEMENT_STATE_pack)(&cmd_buffer->batch, dw + 1, in genX()
162 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VF_SGVS), sgvs); in genX()
166 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VS), vs); in genX()
167 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HS), hs); in genX()
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/external/mesa3d/src/gallium/drivers/freedreno/a5xx/
Dfd5_gmem.c236 use_hw_binning(struct fd_batch *batch) in use_hw_binning() argument
238 struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; in use_hw_binning()
247 (batch->num_draws > 0); in use_hw_binning()
251 patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode) in patch_draws() argument
254 for (i = 0; i < fd_patch_num_elements(&batch->draw_patches); i++) { in patch_draws()
255 struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i); in patch_draws()
258 util_dynarray_resize(&batch->draw_patches, 0); in patch_draws()
262 update_vsc_pipe(struct fd_batch *batch) in update_vsc_pipe() argument
264 struct fd_context *ctx = batch->ctx; in update_vsc_pipe()
266 struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; in update_vsc_pipe()
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/external/libdrm/intel/
DMakefile.am52 tests/gen4-3d.batch \
53 tests/gm45-3d.batch \
54 tests/gen5-3d.batch \
55 tests/gen6-3d.batch \
56 tests/gen7-2d-copy.batch \
57 tests/gen7-3d.batch
60 $(BATCHES:.batch=.batch.sh) \
65 $(BATCHES:.batch=.batch.sh) \
66 $(BATCHES:.batch=.batch-ref.txt) \
67 $(BATCHES:.batch=.batch-ref.txt) \
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/external/mesa3d/src/gallium/drivers/freedreno/a3xx/
Dfd3_gmem.c131 use_hw_binning(struct fd_batch *batch) in use_hw_binning() argument
133 struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; in use_hw_binning()
162 static void update_vsc_pipe(struct fd_batch *batch);
164 emit_binning_workaround(struct fd_batch *batch) in emit_binning_workaround() argument
166 struct fd_context *ctx = batch->ctx; in emit_binning_workaround()
168 struct fd_ringbuffer *ring = batch->gmem; in emit_binning_workaround()
265 fd_wfi(batch, ring); in emit_binning_workaround()
292 fd_reset_wfi(batch); in emit_binning_workaround()
300 fd_wfi(batch, ring); in emit_binning_workaround()
317 emit_gmem2mem_surf(struct fd_batch *batch, in emit_gmem2mem_surf() argument
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/external/mesa3d/src/gallium/drivers/freedreno/a4xx/
Dfd4_gmem.c135 use_hw_binning(struct fd_batch *batch) in use_hw_binning() argument
137 struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; in use_hw_binning()
151 emit_gmem2mem_surf(struct fd_batch *batch, bool stencil, in emit_gmem2mem_surf() argument
154 struct fd_ringbuffer *ring = batch->gmem; in emit_gmem2mem_surf()
184 fd4_draw(batch, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, in emit_gmem2mem_surf()
189 fd4_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile) in fd4_emit_tile_gmem2mem() argument
191 struct fd_context *ctx = batch->ctx; in fd4_emit_tile_gmem2mem()
193 struct fd_ringbuffer *ring = batch->gmem; in fd4_emit_tile_gmem2mem()
194 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in fd4_emit_tile_gmem2mem()
231 fd_wfi(batch, ring); in fd4_emit_tile_gmem2mem()
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/external/grpc-grpc/src/php/tests/unit_tests/
DCallTest.php53 $batch = [
56 $result = $this->call->startBatch($batch);
62 $batch = [
65 $result = $this->call->startBatch($batch);
71 $batch = [
74 $result = $this->call->startBatch($batch);
80 $batch = [
85 $result = $this->call->startBatch($batch);
104 $batch = [
107 $result = $this->call->startBatch($batch);
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/external/grpc-grpc/src/core/ext/filters/client_channel/
Dclient_channel.cc838 grpc_transport_stream_op_batch batch; member
898 grpc_transport_stream_op_batch* batch; member
1003 grpc_call_element* elem, grpc_transport_stream_op_batch* batch);
1015 grpc_transport_stream_op_batch* batch = pending->batch; in maybe_cache_send_ops_for_batch() local
1017 if (batch->send_initial_metadata) { in maybe_cache_send_ops_for_batch()
1021 batch->payload->send_initial_metadata.send_initial_metadata; in maybe_cache_send_ops_for_batch()
1029 batch->payload->send_initial_metadata.send_initial_metadata_flags; in maybe_cache_send_ops_for_batch()
1030 calld->peer_string = batch->payload->send_initial_metadata.peer_string; in maybe_cache_send_ops_for_batch()
1033 if (batch->send_message) { in maybe_cache_send_ops_for_batch()
1038 std::move(batch->payload->send_message.send_message)); in maybe_cache_send_ops_for_batch()
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