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/external/u-boot/arch/arm/cpu/arm920t/ep93xx/
Dspeed.c29 const uint32_t clkset = readl(pllreg); in get_PLLCLK() local
31 rate *= ((clkset >> SYSCON_CLKSET_PLL_X1FBD1_SHIFT) & 0x1f) + 1; in get_PLLCLK()
32 rate *= ((clkset >> SYSCON_CLKSET_PLL_X2FBD2_SHIFT) & 0x3f) + 1; in get_PLLCLK()
33 do_div(rate, (clkset & 0x1f) + 1); /* X2IPD */ in get_PLLCLK()
34 for (i = 0; i < ((clkset >> SYSCON_CLKSET_PLL_PS_SHIFT) & 3); i++) in get_PLLCLK()