| /external/llvm/test/CodeGen/PowerPC/ |
| D | p8-scalar_vector_conversions.ll | 112 ; CHECK-LE: clrldi 3, 3, 56
234 ; CHECK: clrldi 3, 3, 56
256 ; CHECK-LE: clrldi 3, 3, 56
396 ; CHECK: clrldi 3, 3, 56
399 ; CHECK-LE: clrldi 3, 3, 56
413 ; CHECK: clrldi 3, 3, 56
417 ; CHECK-LE: clrldi 3, 3, 56
431 ; CHECK: clrldi 3, 3, 56
435 ; CHECK-LE: clrldi 3, 3, 56
449 ; CHECK: clrldi 3, 3, 56
[all …]
|
| D | stack-realign.ll | 33 ; CHECK-DAG: clrldi [[REG:[0-9]+]], 1, 59
55 ; CHECK-FP-DAG: clrldi [[REG:[0-9]+]], 1, 59
116 ; CHECK-DAG: clrldi [[REG3:[0-9]+]], 1, 59
178 ; CHECK-DAG: clrldi [[REG:[0-9]+]], 1, 59
194 ; CHECK-FP-DAG: clrldi [[REG:[0-9]+]], 1, 59
|
| D | ppc64-zext.ll | 7 ; CHECK: clrldi {{[0-9]+}}, {{[0-9]+}}, 32
|
| D | cmpb.ll | 20 ; CHECK: clrldi 3, [[REG1]], 48
76 ; CHECK: clrldi [[REG2:[0-9]+]], [[REG1]], 55
102 ; CHECK: clrldi 3, [[REG1]], 32
|
| D | aggressive-anti-dep-breaker-subreg.ll | 16 ; CHECK: clrldi 4, [[TEMPREG]], 32
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | vec_extract_p9.ll | 9 ; CHECK-LE-NEXT: clrldi 3, 3, 56
14 ; CHECK-BE-NEXT: clrldi 3, 3, 56
44 ; CHECK-LE-NEXT: clrldi 3, 3, 48
50 ; CHECK-BE-NEXT: clrldi 3, 3, 48
119 ; CHECK-LE-NEXT: clrldi 3, 3, 56
125 ; CHECK-BE-NEXT: clrldi 3, 3, 56
138 ; CHECK-LE-NEXT: clrldi 3, 3, 48
144 ; CHECK-BE-NEXT: clrldi 3, 3, 48
|
| D | fast-isel-ret.ll | 50 ; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 56
66 ; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 48
74 ; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 48
90 ; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 32
98 ; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 32
107 ; ELF64-NOT: clrldi
|
| D | bool-math.ll | 7 ; CHECK-NEXT: clrldi 3, 3, 63
21 ; CHECK-NEXT: clrldi 3, 3, 63
34 ; CHECK-NEXT: clrldi 3, 3, 63
87 ; CHECK-NEXT: clrldi 3, 3, 63
100 ; CHECK-NEXT: clrldi 3, 3, 63
137 ; CHECK-NEXT: clrldi 3, 3, 63
|
| D | testComparesi32ltu.ll | 17 ; CHECK-DAG: clrldi r3, r3, 32
20 ; CHECK-DAG: clrldi r4, r4, 32
41 ; CHECK-DAG: clrldi r3, r3, 32
42 ; CHECK-DAG: clrldi r4, r4, 32
|
| D | testComparesi32gtu.ll | 17 ; CHECK-DAG: clrldi r3, r3, 32
20 ; CHECK-DAG: clrldi r4, r4, 32
41 ; CHECK-DAG: clrldi r3, r3, 32
42 ; CHECK-DAG: clrldi r4, r4, 32
|
| D | fast-isel-call.ll | 32 ; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 56
36 ; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 48
41 ; ELF64-NOT: clrldi
45 ; ELF64: clrldi 3, 3, 48
73 ; ELF64-NOT: clrldi
|
| D | fast-isel-ext.ll | 22 ; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 56
29 ; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 48
36 ; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 32
|
| D | vec_extract_p9_2.ll | 10 ; CHECK-LE-NEXT: clrldi 3, 3, 56
16 ; CHECK-BE-NEXT: clrldi 3, 3, 56
55 ; CHECK-LE-NEXT: clrldi 3, 3, 48
62 ; CHECK-BE-NEXT: clrldi 3, 3, 48
103 ; CHECK-LE-NEXT: clrldi 3, 3, 32
110 ; CHECK-BE-NEXT: clrldi 3, 3, 32
160 ; CHECK-LE-NEXT: clrldi 3, 3, 32
167 ; CHECK-BE-NEXT: clrldi 3, 3, 32
|
| D | funnel-shift.ll | 40 ; CHECK-NEXT: clrldi 5, 5, 27
41 ; CHECK-NEXT: clrldi 4, 4, 27
43 ; CHECK-NEXT: clrldi 7, 7, 27
152 ; CHECK-NEXT: clrldi 5, 5, 27
153 ; CHECK-NEXT: clrldi 9, 4, 27
155 ; CHECK-NEXT: clrldi 7, 7, 27
|
| D | stack-realign.ll | 33 ; CHECK-DAG: clrldi [[REG:[0-9]+]], 1, 59
55 ; CHECK-FP-DAG: clrldi [[REG:[0-9]+]], 1, 59
126 ; CHECK-DAG: clrldi [[REG3:[0-9]+]], 1, 59
196 ; CHECK-DAG: clrldi [[REG:[0-9]+]], 1, 59
212 ; CHECK-FP-DAG: clrldi [[REG:[0-9]+]], 1, 59
|
| D | testComparesi32leu.ll | 14 ; CHECK-NEXT: clrldi r3, r3, 32
15 ; CHECK-NEXT: clrldi r4, r4, 32
|
| D | p8-scalar_vector_conversions.ll | 95 ; CHECK-LE: clrldi 3, 3, 56
196 ; CHECK: clrldi 3, 3, 56
215 ; CHECK-LE: clrldi 3, 3, 56
333 ; CHECK-LE: clrldi 3, 3, 56
421 ; CHECK: clrldi 3, 3, 56
437 ; CHECK-LE: clrldi 3, 3, 56
525 ; CHECK: clrldi 3, 3, 56
573 ; CHECK-DAG: clrldi 3, 3, 56
584 ; CHECK-DAG-LE: clrldi 3, 3, 56
598 ; CHECK-LE: clrldi 3, 3, 48
[all …]
|
| D | testComparesllltui.ll | 14 ; CHECK-NOT: clrldi
61 ; CHECK-NOT: clrldi
75 ; CHECK-NOT: clrldi
|
| D | ppc64-zext.ll | 7 ; CHECK: clrldi {{[0-9]+}}, {{[0-9]+}}, 32
|
| D | crbits.ll | 100 ; CHECK-DAG: clrldi [[TRUNC:[0-9]+]], [[REG1]], 63
118 ; CHECK-DAG: clrldi [[CLR1:[0-9]+]], 4, 63
119 ; CHECK-DAG: clrldi [[CLR2:[0-9]+]], 3, 63
|
| D | cmpb.ll | 20 ; CHECK: clrldi 3, [[REG1]], 48
76 ; CHECK: clrldi [[REG2:[0-9]+]], [[REG1]], 55
102 ; CHECK: clrldi 3, [[REG1]], 32
|
| D | negate-i1.ll | 8 ; CHECK-NEXT: clrldi 3, 3, 63
|
| D | BoolRetToIntTest-2.ll | 5 ; CHECK-NOT: clrldi
|
| D | aggressive-anti-dep-breaker-subreg.ll | 16 ; CHECK: clrldi 4, [[TEMPREG]], 32
|
| D | fast-isel-conversion.ll | 210 ; CHECK: clrldi {{[0-9]+}}, {{[0-9]+}}, 48
231 ; CHECK: clrldi {{[0-9]+}}, {{[0-9]+}}, 56
284 ; CHECK: clrldi {{[0-9]+}}, {{[0-9]+}}, 48
304 ; CHECK: clrldi {{[0-9]+}}, {{[0-9]+}}, 56
|