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/external/llvm/test/CodeGen/AArch64/
Darm64-csel.ll17 ; CHECK: cneg w{{[0-9]+}}, w{{[0-9]+}}, ne
41 ; CHECK: cneg
53 ; CHECK-NEXT: cneg
138 ; CHECK: cneg w0, w[[REG]], eq
149 ; CHECK: cneg x0, x[[REG]], eq
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-csel.ll17 ; CHECK: cneg w{{[0-9]+}}, w{{[0-9]+}}, ne
41 ; CHECK: cneg
53 ; CHECK-NEXT: cneg
139 ; CHECK: cneg w0, w[[REG]], eq
150 ; CHECK: cneg x0, x[[REG]], eq
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dbasic-a64-diagnostics.s1432 cneg w3, wsp, ne
1433 cneg sp, x9, eq
1434 cneg x4, x5, al
Dbasic-a64-instructions.s1439 cneg w3, w5, gt
1440 cneg wzr, w4, le
1441 cneg w9, wzr, lt
1446 cneg x3, x5, gt
1447 cneg xzr, x4, le
1448 cneg x9, xzr, lt
/external/llvm/test/MC/AArch64/
Dbasic-a64-diagnostics.s1427 cneg w3, wsp, ne
1428 cneg sp, x9, eq
1429 cneg x4, x5, al
Dbasic-a64-instructions.s1439 cneg w3, w5, gt
1440 cneg wzr, w4, le
1441 cneg w9, wzr, lt
1446 cneg x3, x5, gt
1447 cneg xzr, x4, le
1448 cneg x9, xzr, lt
/external/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt995 # CHECK: cneg w3, w5, gt
996 # CHECK: cneg wzr, w4, le
997 # CHECK: cneg w9, wzr, lt
998 # CHECK: cneg x3, x5, gt
999 # CHECK: cneg xzr, x4, le
1000 # CHECK: cneg x9, xzr, lt
1001 # "cneg x4, x8, nv" and "cneg w5, w6, al" are invalid aliases for these two
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt996 # CHECK: cneg w3, w5, gt
997 # CHECK: cneg wzr, w4, le
998 # CHECK: cneg w9, wzr, lt
999 # CHECK: cneg x3, x5, gt
1000 # CHECK: cneg xzr, x4, le
1001 # CHECK: cneg x9, xzr, lt
1002 # "cneg x4, x8, nv" and "cneg w5, w6, al" are invalid aliases for these two
/external/v8/src/arm64/
Dmacro-assembler-arm64-inl.h380 cneg(rd, rn, cond); in Cneg()
Dassembler-arm64.h1507 void cneg(const Register& rd, const Register& rn, Condition cond);
Dassembler-arm64.cc1404 void Assembler::cneg(const Register &rd, const Register &rn, Condition cond) { in cneg() function in v8::internal::Assembler
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour52 0x~~~~~~~~~~~~~~~~ 5a8e95cd cneg w13, w14, hi
53 0x~~~~~~~~~~~~~~~~ 5a8e85cd cneg w13, w14, ls
54 0x~~~~~~~~~~~~~~~~ da90160f cneg x15, x16, eq
55 0x~~~~~~~~~~~~~~~~ da90060f cneg x15, x16, ne
Dlog-disasm52 0x~~~~~~~~~~~~~~~~ 5a8e95cd cneg w13, w14, hi
53 0x~~~~~~~~~~~~~~~~ 5a8e85cd cneg w13, w14, ls
54 0x~~~~~~~~~~~~~~~~ da90160f cneg x15, x16, eq
55 0x~~~~~~~~~~~~~~~~ da90060f cneg x15, x16, ne
Dlog-cpufeatures-custom52 0x~~~~~~~~~~~~~~~~ 5a8e95cd cneg w13, w14, hi
53 0x~~~~~~~~~~~~~~~~ 5a8e85cd cneg w13, w14, ls
54 0x~~~~~~~~~~~~~~~~ da90160f cneg x15, x16, eq
55 0x~~~~~~~~~~~~~~~~ da90060f cneg x15, x16, ne
Dlog-cpufeatures52 0x~~~~~~~~~~~~~~~~ 5a8e95cd cneg w13, w14, hi
53 0x~~~~~~~~~~~~~~~~ 5a8e85cd cneg w13, w14, ls
54 0x~~~~~~~~~~~~~~~~ da90160f cneg x15, x16, eq
55 0x~~~~~~~~~~~~~~~~ da90060f cneg x15, x16, ne
Dlog-cpufeatures-colour52 0x~~~~~~~~~~~~~~~~ 5a8e95cd cneg w13, w14, hi
53 0x~~~~~~~~~~~~~~~~ 5a8e85cd cneg w13, w14, ls
54 0x~~~~~~~~~~~~~~~~ da90160f cneg x15, x16, eq
55 0x~~~~~~~~~~~~~~~~ da90060f cneg x15, x16, ne
Dlog-all174 0x~~~~~~~~~~~~~~~~ 5a8e95cd cneg w13, w14, hi
176 0x~~~~~~~~~~~~~~~~ 5a8e85cd cneg w13, w14, ls
178 0x~~~~~~~~~~~~~~~~ da90160f cneg x15, x16, eq
180 0x~~~~~~~~~~~~~~~~ da90060f cneg x15, x16, ne
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc105 __ cneg(w13, w14, hi); in GenerateTestSequenceBase() local
106 __ cneg(w13, w14, ls); in GenerateTestSequenceBase() local
107 __ cneg(x15, x16, eq); in GenerateTestSequenceBase() local
108 __ cneg(x15, x16, ne); in GenerateTestSequenceBase() local
Dtest-disasm-aarch64.cc2450 COMPARE(cneg(w5, w6, hs), "cneg w5, w6, hs"); in TEST()
2451 COMPARE(cneg(x7, x8, lo), "cneg x7, x8, lo"); in TEST()
Dtest-cpu-features-aarch64.cc247 TEST_NONE(cneg_0, cneg(w0, w1, mi))
248 TEST_NONE(cneg_1, cneg(x0, x1, cs))
/external/vixl/src/aarch64/
Dassembler-aarch64.h899 void cneg(const Register& rd, const Register& rn, Condition cond);
Dmacro-assembler-aarch64.h1242 cneg(rd, rn, cond); in Cneg()
Dassembler-aarch64.cc763 void Assembler::cneg(const Register& rd, const Register& rn, Condition cond) { in cneg() function in vixl::aarch64::Assembler
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md304 void cneg(const Register& rd, const Register& rn, Condition cond)
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td1172 def : InstAlias<"cneg $dst, $src, $cc",
1174 def : InstAlias<"cneg $dst, $src, $cc",

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