Home
last modified time | relevance | path

Searched refs:cntcr (Results 1 – 13 of 13) sorted by relevance

/external/u-boot/arch/arm/mach-imx/
Dsyscounter.c69 val = readl(&sctr->cntcr); in timer_init()
72 writel(val, &sctr->cntcr); in timer_init()
/external/u-boot/arch/arm/include/asm/arch-tegra114/
Dsysctr.h10 u32 cntcr; /* 0x00: SYSCTR0_CNTCR Counter Control */ member
/external/u-boot/arch/arm/include/asm/arch-tegra210/
Dsysctr.h11 u32 cntcr; /* 0x00: SYSCTR0_CNTCR Counter Control */ member
/external/u-boot/arch/arm/include/asm/arch-tegra124/
Dsysctr.h11 u32 cntcr; /* 0x00: SYSCTR0_CNTCR Counter Control */ member
/external/u-boot/arch/arm/include/asm/mach-imx/
Dsyscounter.h11 u32 cntcr; member
/external/u-boot/arch/arm/cpu/armv7/ls102xa/
Dtimer.c62 writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr); in timer_init()
/external/u-boot/arch/arm/mach-imx/mx8m/
Dsoc.c40 clrsetbits_le32(&sctr->cntcr, SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1, in timer_init()
/external/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
Dcpu.c576 u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR; in timer_init() local
612 cntcr = (u32 *)SYS_FSL_LS2080A_LS2085A_TIMER_ADDR; in timer_init()
619 out_le32(cntcr, 0x1); in timer_init()
/external/u-boot/arch/arm/mach-tegra/tegra114/
Dclock.c728 val = readl(&sysctr->cntcr); in arch_timer_init()
730 writel(val, &sysctr->cntcr); in arch_timer_init()
/external/u-boot/arch/arm/include/asm/arch-ls102xa/
Dimmap_ls102xa.h299 u32 cntcr; member
/external/u-boot/arch/arm/mach-tegra/tegra124/
Dclock.c926 val = readl(&sysctr->cntcr); in arch_timer_init()
928 writel(val, &sysctr->cntcr); in arch_timer_init()
/external/u-boot/arch/arm/mach-tegra/tegra210/
Dclock.c1059 val = readl(&sysctr->cntcr); in arch_timer_init()
1061 writel(val, &sysctr->cntcr); in arch_timer_init()
/external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
Dimmap_lsch2.h528 u32 cntcr; member