Searched refs:con0 (Results 1 – 15 of 15) sorted by relevance
| /external/u-boot/drivers/clk/rockchip/ |
| D | clk_rv1108.c | 64 uint32_t con0, con1, con3; in rkclk_pll_get_rate() local
72 con0 = readl(&pll->con0); in rkclk_pll_get_rate()
74 fbdiv = (con0 >> FBDIV_SHIFT) & FBDIV_MASK; in rkclk_pll_get_rate()
|
| D | clk_rk3036.c | 64 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
197 con = readl(&pll->con0); in rkclk_pll_get_rate()
|
| D | clk_rk322x.c | 62 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
198 con = readl(&pll->con0); in rkclk_pll_get_rate()
|
| D | clk_rk3128.c | 59 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
265 con = readl(&pll->con0); in rkclk_pll_get_rate()
|
| D | clk_rk3188.c | 103 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
245 con = readl(&pll->con0); in rkclk_pll_get_rate()
|
| D | clk_rk3368.c | 74 con = readl(&pll->con0); in rkclk_pll_get_rate()
103 rk_clrsetreg(&pll->con0, PLL_NR_MASK | PLL_OD_MASK, in rkclk_set_pll()
|
| D | clk_rk3288.c | 161 rk_clrsetreg(&pll->con0, CLKR_MASK | PLL_OD_MASK, in rkclk_set_pll()
512 con = readl(&pll->con0); in rkclk_pll_get_rate()
|
| /external/u-boot/arch/arm/include/asm/arch-rockchip/ |
| D | cru_rv1108.h | 23 unsigned int con0; member
|
| D | cru_rk3188.h | 35 u32 con0; member
|
| D | cru_rk3368.h | 25 unsigned int con0; member
|
| D | cru_rk3036.h | 34 unsigned int con0; member
|
| D | cru_rk322x.h | 35 unsigned int con0; member
|
| D | cru_rk3128.h | 35 unsigned int con0; member
|
| D | cru_rk3288.h | 36 u32 con0; member
|
| /external/u-boot/arch/arm/mach-rockchip/rk3036/ |
| D | sdram_rk3036.c | 338 rk_clrsetreg(&pll->con0, in rkdclk_init()
|