Searched refs:config_bits (Results 1 – 6 of 6) sorted by relevance
106 (vc4->rasterizer->config_bits[0] | in vc4_emit_state()107 vc4->zsa->config_bits[0]) & rasosm_mask_out); in vc4_emit_state()109 vc4->rasterizer->config_bits[1] | in vc4_emit_state()110 vc4->zsa->config_bits[1]); in vc4_emit_state()112 (vc4->rasterizer->config_bits[2] | in vc4_emit_state()113 vc4->zsa->config_bits[2]) & ez_enable_mask_out); in vc4_emit_state()
108 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_FRONT; in vc4_create_rasterizer_state()110 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_BACK; in vc4_create_rasterizer_state()120 so->config_bits[0] |= VC4_CONFIG_BITS_CW_PRIMITIVES; in vc4_create_rasterizer_state()123 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET; in vc4_create_rasterizer_state()132 so->config_bits[0] |= VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_4X; in vc4_create_rasterizer_state()220 so->config_bits[2] |= VC4_CONFIG_BITS_EARLY_Z_UPDATE; in vc4_create_depth_stencil_alpha_state()224 so->config_bits[1] |= VC4_CONFIG_BITS_Z_UPDATE; in vc4_create_depth_stencil_alpha_state()226 so->config_bits[1] |= (cso->depth.func << in vc4_create_depth_stencil_alpha_state()239 so->config_bits[2] |= VC4_CONFIG_BITS_EARLY_Z; in vc4_create_depth_stencil_alpha_state()242 so->config_bits[1] |= (PIPE_FUNC_ALWAYS << in vc4_create_depth_stencil_alpha_state()
400 uint8_t config_bits[V3D21_CONFIGURATION_BITS_length]; member416 uint8_t config_bits[V3D21_CONFIGURATION_BITS_length]; member
73 uint32_t config_bits; /*!< Configuration flag bits set */ member
231 header_ptr->config_bits = 0; in tbd_create()573 fprintf(a_outfile, "Data config: 0x%08x\n", header_ptr->config_bits); in tbd_infoprint()
396 uint8_t config_bits[3]; member