| /external/llvm/test/CodeGen/PowerPC/ |
| D | cr1eq.ll | 13 ; CHECK: creqv 6, 6, 6
|
| D | crbits.ll | 40 ; CHECK: creqv [[REG4:[0-9]+]],
63 ; CHECK: creqv [[REG4:[0-9]+]],
|
| D | select-i1-vs-i1.ll | 84 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
244 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
416 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
606 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
804 ; CHECK-DAG: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
931 ; CHECK: creqv [[REG3:[0-9]+]], [[REG2]], [[REG1]]
1022 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1200 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1390 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1580 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
| D | cr1eq.ll | 13 ; CHECK: creqv 6, 6, 6
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | cr1eq.ll | 13 ; CHECK: creqv 6, 6, 6
|
| D | crbits.ll | 47 ; CHECK: creqv [[REG4:[0-9]+]],
70 ; CHECK: creqv [[REG4:[0-9]+]],
|
| D | select-i1-vs-i1.ll | 114 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
344 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
559 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
749 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1321 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1511 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1701 ; CHECK: creqv [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
|
| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding.s.cs | 15 0x4c,0x43,0x22,0x42 = creqv 2, 3, 4
|
| D | ppc64-encoding-ext.s.cs | 386 0x4c,0x42,0x12,0x42 = creqv 2, 2, 2
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 93 # CHECK-BE: creqv 2, 3, 4 # encoding: [0x4c,0x43,0x22,0x42]
94 # CHECK-LE: creqv 2, 3, 4 # encoding: [0x42,0x22,0x43,0x4c]
95 creqv 2, 3, 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 134 # CHECK-BE: creqv 2, 3, 4 # encoding: [0x4c,0x43,0x22,0x42]
135 # CHECK-LE: creqv 2, 3, 4 # encoding: [0x42,0x22,0x43,0x4c]
136 creqv 2, 3, 4
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCSchedule.td | 142 // creqv BrCR
|
| D | PPCInstrInfo.td | 1044 "creqv $CRD, $CRA, $CRB", BrCR,
1053 "creqv $dst, $dst, $dst", BrCR,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64le-encoding.txt | 58 # CHECK: creqv 2, 3, 4
|
| D | ppc64-encoding.txt | 58 # CHECK: creqv 2, 3, 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCScheduleP8.td | 122 // IIC_BrCR consists of the cr* instructions. (crand,crnor,creqv, etc).
|
| D | PPCInstrInfo.td | 2492 "creqv $CRD, $CRA, $CRB", IIC_BrCR,
2508 "creqv $dst, $dst, $dst", IIC_BrCR,
2517 "creqv 6, 6, 6", IIC_BrCR,
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding.txt | 58 # CHECK: creqv 2, 3, 4
|
| D | ppc64le-encoding.txt | 58 # CHECK: creqv 2, 3, 4
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCScheduleP8.td | 122 // IIC_BrCR consists of the cr* instructions. (crand,crnor,creqv, etc).
|
| D | PPCInstrInfo.td | 2258 "creqv $CRD, $CRA, $CRB", IIC_BrCR,
2274 "creqv $dst, $dst, $dst", IIC_BrCR,
2283 "creqv 6, 6, 6", IIC_BrCR,
|
| /external/v8/src/ppc/ |
| D | assembler-ppc.h | 1161 void creqv(int bt, int ba, int bb);
1162 void crset(int bt) { creqv(bt, bt, bt); } in crset()
|
| D | constants-ppc.h | 2100 V(creqv, CREQV, 0x4C000242) \
|
| D | assembler-ppc.cc | 1566 void Assembler::creqv(int bt, int ba, int bb) { in creqv() function in v8::internal::Assembler
|
| /external/u-boot/doc/ |
| D | README.POST | 421 cror, crorc, crxor, crnand, crnor, creqv, mcrf.
|