| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | cr1eq-no-extra-moves.ll | 9 ; CHECK: crxor 6, 6, 6
16 ; CHECK: crxor 6, 6, 6
|
| D | ppc32-i1-vaarg.ll | 14 ; CHECK-DAG: crxor 6, 6, 6
|
| D | cr1eq.ll | 11 ; CHECK: crxor 6, 6, 6
|
| D | select-i1-vs-i1.ll | 229 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
459 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
654 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
844 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
931 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1019 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1044 ; CHECK: crxor [[REG3:[0-9]+]], [[REG2]], [[REG1]]
1137 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1226 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1416 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
[all …]
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | cr1eq-no-extra-moves.ll | 9 ; CHECK: crxor 6, 6, 6
16 ; CHECK: crxor 6, 6, 6
|
| D | ppc32-i1-vaarg.ll | 14 ; CHECK-DAG: crxor 6, 6, 6
|
| D | cr1eq.ll | 11 ; CHECK: crxor 6, 6, 6
|
| D | select-i1-vs-i1.ll | 164 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
324 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
511 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
701 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
904 ; CHECK-DAG: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1107 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1295 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1485 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
1675 ; CHECK: crxor [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
| D | cr1eq.ll | 11 ; CHECK: crxor 6, 6, 6
|
| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding.s.cs | 13 0x4c,0x43,0x21,0x82 = crxor 2, 3, 4
|
| D | ppc64-encoding-ext.s.cs | 387 0x4c,0x42,0x11,0x82 = crxor 2, 2, 2
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 87 # CHECK-BE: crxor 2, 3, 4 # encoding: [0x4c,0x43,0x21,0x82]
88 # CHECK-LE: crxor 2, 3, 4 # encoding: [0x82,0x21,0x43,0x4c]
89 crxor 2, 3, 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 128 # CHECK-BE: crxor 2, 3, 4 # encoding: [0x4c,0x43,0x21,0x82]
129 # CHECK-LE: crxor 2, 3, 4 # encoding: [0x82,0x21,0x43,0x4c]
130 crxor 2, 3, 4
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCSchedule.td | 147 // crxor BrCR
|
| D | PPCInstrInfo.td | 1057 "crxor $dst, $dst, $dst", BrCR,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64le-encoding.txt | 52 # CHECK: crxor 2, 3, 4
|
| D | ppc64-encoding.txt | 52 # CHECK: crxor 2, 3, 4
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding.txt | 52 # CHECK: crxor 2, 3, 4
|
| D | ppc64le-encoding.txt | 52 # CHECK: crxor 2, 3, 4
|
| /external/v8/src/ppc/ |
| D | assembler-ppc.h | 1159 void crxor(int bt, int ba, int bb);
1160 void crclr(int bt) { crxor(bt, bt, bt); } in crclr()
|
| D | constants-ppc.h | 2110 V(crxor, CRXOR, 0x4C000182) \
|
| D | assembler-ppc.cc | 1561 void Assembler::crxor(int bt, int ba, int bb) { in crxor() function in v8::internal::Assembler
|
| /external/u-boot/doc/ |
| D | README.POST | 421 cror, crorc, crxor, crnand, crnor, creqv, mcrf.
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 2248 "crxor $CRD, $CRA, $CRB", IIC_BrCR,
2278 "crxor $dst, $dst, $dst", IIC_BrCR,
2287 "crxor 6, 6, 6", IIC_BrCR,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 2482 "crxor $CRD, $CRA, $CRB", IIC_BrCR,
2512 "crxor $dst, $dst, $dst", IIC_BrCR,
2521 "crxor 6, 6, 6", IIC_BrCR,
|