Searched refs:ctrl_level_phase (Results 1 – 1 of 1) sorted by relevance
91 u32 ctrl_level_phase[MAX_CS_NUM * MAX_INTERFACE_NUM * MAX_BUS_NUM]; variable1491 ctrl_level_phase[adll] = 0; in ddr3_tip_run_leveling_sweep_test()1497 read_phase_value(dev_num, ctrl_level_phase, reg, 0x7 << 6); in ddr3_tip_run_leveling_sweep_test()1512 (ctrl_level_phase[if_id * cs * in ddr3_tip_run_leveling_sweep_test()1586 ctrl_level_phase[if_id * cs * octets_per_if_num + pup]; in ddr3_tip_run_leveling_sweep_test()1632 write_leveling_value(dev_num, ctrl_adll, ctrl_level_phase, reg); in ddr3_tip_run_leveling_sweep_test()1640 print_ph(dev_num, ctrl_level_phase); in ddr3_tip_run_leveling_sweep_test()