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Searched refs:ctrl_lpddr2ch (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-omap2/omap5/
Dhw_data.c662 .ctrl_lpddr2ch = DDR_IO_I_34OHM_SR_FASTEST_WD_CK_CKE_NCS_CA_PULL_DOWN,
670 .ctrl_lpddr2ch = 0x0,
681 .ctrl_lpddr2ch = 0x0,
692 .ctrl_lpddr2ch = 0x40404040,
704 .ctrl_lpddr2ch = 0x40404040,
716 .ctrl_lpddr2ch = 0x40404040,
Dhwinit.c63 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0); in io_settings_lpddr2()
64 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1); in io_settings_lpddr2()
90 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1); in io_settings_ddr3()
94 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0); in io_settings_ddr3()
/external/u-boot/arch/arm/include/asm/arch-omap5/
Domap.h246 u32 ctrl_lpddr2ch; member