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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/X86/
Dcttz.ll11 declare i64 @llvm.cttz.i64(i64, i1)
12 declare i32 @llvm.cttz.i32(i32, i1)
13 declare i16 @llvm.cttz.i16(i16, i1)
14 declare i8 @llvm.cttz.i8(i8, i1)
18 …T: Cost Model: Found an estimated cost of 1 for instruction: %cttz = call i64 @llvm.cttz.i64(i64 …
19 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i64 %cttz
21 %cttz = call i64 @llvm.cttz.i64(i64 %a, i1 0)
22 ret i64 %cttz
27 …T: Cost Model: Found an estimated cost of 1 for instruction: %cttz = call i64 @llvm.cttz.i64(i64 …
28 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i64 %cttz
[all …]
Dscalarize.ll16 declare %i4 @llvm.cttz.v4i32(%i4)
17 declare %i8 @llvm.cttz.v2i64(%i8)
31 ; CHECK32: cost of 14 {{.*}}cttz.v4i32
32 ; CHECK64: cost of 14 {{.*}}cttz.v4i32
33 %r4 = call %i4 @llvm.cttz.v4i32(%i4 undef)
34 ; CHECK32: cost of 10 {{.*}}cttz.v2i64
35 ; CHECK64: cost of 10 {{.*}}cttz.v2i64
36 %r5 = call %i8 @llvm.cttz.v2i64(%i8 undef)
/external/llvm/test/Analysis/CostModel/X86/
Dctbits-cost.ll250 declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>, i1)
251 declare <4 x i32> @llvm.cttz.v4i32(<4 x i32>, i1)
252 declare <8 x i16> @llvm.cttz.v8i16(<8 x i16>, i1)
253 declare <16 x i8> @llvm.cttz.v16i8(<16 x i8>, i1)
255 declare <4 x i64> @llvm.cttz.v4i64(<4 x i64>, i1)
256 declare <8 x i32> @llvm.cttz.v8i32(<8 x i32>, i1)
257 declare <16 x i16> @llvm.cttz.v16i16(<16 x i16>, i1)
258 declare <32 x i8> @llvm.cttz.v32i8(<32 x i8>, i1)
262 ; SSE: Found an estimated cost of 6 for instruction: %cttz
263 ; AVX: Found an estimated cost of 6 for instruction: %cttz
[all …]
Dscalarize.ll16 declare %i4 @llvm.cttz.v4i32(%i4)
17 declare %i8 @llvm.cttz.v2i64(%i8)
31 ; CHECK32: cost of 12 {{.*}}cttz.v4i32
32 ; CHECK64: cost of 12 {{.*}}cttz.v4i32
33 %r4 = call %i4 @llvm.cttz.v4i32(%i4 undef)
34 ; CHECK32: cost of 10 {{.*}}cttz.v2i64
35 ; CHECK64: cost of 6 {{.*}}cttz.v2i64
36 %r5 = call %i8 @llvm.cttz.v2i64(%i8 undef)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dcttz_zero_undef.ll5 declare i7 @llvm.cttz.i7(i7, i1) nounwind readnone
6 declare i8 @llvm.cttz.i8(i8, i1) nounwind readnone
7 declare i16 @llvm.cttz.i16(i16, i1) nounwind readnone
8 declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
9 declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone
10 declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1) nounwind readnone
11 declare <4 x i32> @llvm.cttz.v4i32(<4 x i32>, i1) nounwind readnone
23 %cttz = call i32 @llvm.cttz.i32(i32 %val, i1 true) nounwind readnone
24 store i32 %cttz, i32 addrspace(1)* %out, align 4
39 %cttz = call i32 @llvm.cttz.i32(i32 %val, i1 true) nounwind readnone
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
Dcttz.ll18 declare i64 @llvm.cttz.i64(i64, i1)
19 declare i32 @llvm.cttz.i32(i32, i1)
20 declare i16 @llvm.cttz.i16(i16, i1)
21 declare i8 @llvm.cttz.i8(i8, i1)
31 ; CHECK-NEXT: [[CTTZ0:%.*]] = call i64 @llvm.cttz.i64(i64 [[LD0]], i1 false)
32 ; CHECK-NEXT: [[CTTZ1:%.*]] = call i64 @llvm.cttz.i64(i64 [[LD1]], i1 false)
39 %cttz0 = call i64 @llvm.cttz.i64(i64 %ld0, i1 0)
40 %cttz1 = call i64 @llvm.cttz.i64(i64 %ld1, i1 0)
52 ; CHECK-NEXT: [[CTTZ0:%.*]] = call i64 @llvm.cttz.i64(i64 [[LD0]], i1 false)
53 ; CHECK-NEXT: [[CTTZ1:%.*]] = call i64 @llvm.cttz.i64(i64 [[LD1]], i1 false)
[all …]
/external/llvm/test/Transforms/SLPVectorizer/X86/
Dcttz.ll17 declare i64 @llvm.cttz.i64(i64, i1)
18 declare i32 @llvm.cttz.i32(i32, i1)
19 declare i16 @llvm.cttz.i16(i16, i1)
20 declare i8 @llvm.cttz.i8(i8, i1)
30 ; CHECK-NEXT: [[CTTZ0:%.*]] = call i64 @llvm.cttz.i64(i64 [[LD0]], i1 false)
31 ; CHECK-NEXT: [[CTTZ1:%.*]] = call i64 @llvm.cttz.i64(i64 [[LD1]], i1 false)
38 %cttz0 = call i64 @llvm.cttz.i64(i64 %ld0, i1 0)
39 %cttz1 = call i64 @llvm.cttz.i64(i64 %ld1, i1 0)
51 ; CHECK-NEXT: [[CTTZ0:%.*]] = call i64 @llvm.cttz.i64(i64 [[LD0]], i1 false)
52 ; CHECK-NEXT: [[CTTZ1:%.*]] = call i64 @llvm.cttz.i64(i64 [[LD1]], i1 false)
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dcttz_zero_undef.ll5 declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
6 declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1) nounwind readnone
7 declare <4 x i32> @llvm.cttz.v4i32(<4 x i32>, i1) nounwind readnone
18 %cttz = call i32 @llvm.cttz.i32(i32 %val, i1 true) nounwind readnone
19 store i32 %cttz, i32 addrspace(1)* %out, align 4
32 %cttz = call i32 @llvm.cttz.i32(i32 %val, i1 true) nounwind readnone
33 store i32 %cttz, i32 addrspace(1)* %out, align 4
48 %cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %val, i1 true) nounwind readnone
49 store <2 x i32> %cttz, <2 x i32> addrspace(1)* %out, align 8
68 %cttz = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %val, i1 true) nounwind readnone
[all …]
/external/llvm/test/CodeGen/ARM/
Dcttz.ll4 ; This test checks the @llvm.cttz.* intrinsics for integers.
6 declare i8 @llvm.cttz.i8(i8, i1)
7 declare i16 @llvm.cttz.i16(i16, i1)
8 declare i32 @llvm.cttz.i32(i32, i1)
9 declare i64 @llvm.cttz.i64(i64, i1)
18 %tmp = call i8 @llvm.cttz.i8(i8 %a, i1 false)
27 %tmp = call i16 @llvm.cttz.i16(i16 %a, i1 false)
35 %tmp = call i32 @llvm.cttz.i32(i32 %a, i1 false)
47 %tmp = call i64 @llvm.cttz.i64(i64 %a, i1 false)
58 %tmp = call i8 @llvm.cttz.i8(i8 %a, i1 true)
[all …]
Dcttz_vector.ll3 ; This test checks the @llvm.cttz.* intrinsics for vectors.
5 declare <1 x i8> @llvm.cttz.v1i8(<1 x i8>, i1)
6 declare <2 x i8> @llvm.cttz.v2i8(<2 x i8>, i1)
7 declare <4 x i8> @llvm.cttz.v4i8(<4 x i8>, i1)
8 declare <8 x i8> @llvm.cttz.v8i8(<8 x i8>, i1)
9 declare <16 x i8> @llvm.cttz.v16i8(<16 x i8>, i1)
11 declare <1 x i16> @llvm.cttz.v1i16(<1 x i16>, i1)
12 declare <2 x i16> @llvm.cttz.v2i16(<2 x i16>, i1)
13 declare <4 x i16> @llvm.cttz.v4i16(<4 x i16>, i1)
14 declare <8 x i16> @llvm.cttz.v8i16(<8 x i16>, i1)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dcttz.ll4 ; This test checks the @llvm.cttz.* intrinsics for integers.
6 declare i8 @llvm.cttz.i8(i8, i1)
7 declare i16 @llvm.cttz.i16(i16, i1)
8 declare i32 @llvm.cttz.i32(i32, i1)
9 declare i64 @llvm.cttz.i64(i64, i1)
18 %tmp = call i8 @llvm.cttz.i8(i8 %a, i1 false)
27 %tmp = call i16 @llvm.cttz.i16(i16 %a, i1 false)
35 %tmp = call i32 @llvm.cttz.i32(i32 %a, i1 false)
47 %tmp = call i64 @llvm.cttz.i64(i64 %a, i1 false)
58 %tmp = call i8 @llvm.cttz.i8(i8 %a, i1 true)
[all …]
Dcttz_vector.ll3 ; This test checks the @llvm.cttz.* intrinsics for vectors.
5 declare <1 x i8> @llvm.cttz.v1i8(<1 x i8>, i1)
6 declare <2 x i8> @llvm.cttz.v2i8(<2 x i8>, i1)
7 declare <4 x i8> @llvm.cttz.v4i8(<4 x i8>, i1)
8 declare <8 x i8> @llvm.cttz.v8i8(<8 x i8>, i1)
9 declare <16 x i8> @llvm.cttz.v16i8(<16 x i8>, i1)
11 declare <1 x i16> @llvm.cttz.v1i16(<1 x i16>, i1)
12 declare <2 x i16> @llvm.cttz.v2i16(<2 x i16>, i1)
13 declare <4 x i16> @llvm.cttz.v4i16(<4 x i16>, i1)
14 declare <8 x i16> @llvm.cttz.v8i16(<8 x i16>, i1)
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dvec-cttz-01.ll5 declare <16 x i8> @llvm.cttz.v16i8(<16 x i8> %src, i1 %is_zero_undef)
6 declare <8 x i16> @llvm.cttz.v8i16(<8 x i16> %src, i1 %is_zero_undef)
7 declare <4 x i32> @llvm.cttz.v4i32(<4 x i32> %src, i1 %is_zero_undef)
8 declare <2 x i64> @llvm.cttz.v2i64(<2 x i64> %src, i1 %is_zero_undef)
15 %res = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %a, i1 false)
24 %res = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %a, i1 true)
33 %res = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %a, i1 false)
42 %res = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %a, i1 true)
51 %res = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %a, i1 false)
60 %res = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %a, i1 true)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dvec-cttz-01.ll5 declare <16 x i8> @llvm.cttz.v16i8(<16 x i8> %src, i1 %is_zero_undef)
6 declare <8 x i16> @llvm.cttz.v8i16(<8 x i16> %src, i1 %is_zero_undef)
7 declare <4 x i32> @llvm.cttz.v4i32(<4 x i32> %src, i1 %is_zero_undef)
8 declare <2 x i64> @llvm.cttz.v2i64(<2 x i64> %src, i1 %is_zero_undef)
15 %res = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %a, i1 false)
24 %res = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %a, i1 true)
33 %res = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %a, i1 false)
42 %res = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %a, i1 true)
51 %res = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %a, i1 false)
60 %res = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %a, i1 true)
[all …]
/external/llvm/test/CodeGen/NVPTX/
Dcttz.ll6 declare i16 @llvm.cttz.i16(i16, i1) readnone
7 declare i32 @llvm.cttz.i32(i32, i1) readnone
8 declare i64 @llvm.cttz.i64(i64, i1) readnone
12 %val = call i32 @llvm.cttz.i32(i32 %a, i1 false) readnone
18 %val = call i16 @llvm.cttz.i16(i16 %a, i1 false) readnone
24 %val = call i64 @llvm.cttz.i64(i64 %a, i1 false) readnone
31 %val = call i32 @llvm.cttz.i32(i32 %a, i1 true) readnone
37 %val = call i16 @llvm.cttz.i16(i16 %a, i1 true) readnone
43 %val = call i64 @llvm.cttz.i64(i64 %a, i1 true) readnone
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/NVPTX/
Dcttz.ll5 declare i16 @llvm.cttz.i16(i16, i1) readnone
6 declare i32 @llvm.cttz.i32(i32, i1) readnone
7 declare i64 @llvm.cttz.i64(i64, i1) readnone
11 %val = call i32 @llvm.cttz.i32(i32 %a, i1 false) readnone
17 %val = call i16 @llvm.cttz.i16(i16 %a, i1 false) readnone
23 %val = call i64 @llvm.cttz.i64(i64 %a, i1 false) readnone
30 %val = call i32 @llvm.cttz.i32(i32 %a, i1 true) readnone
36 %val = call i16 @llvm.cttz.i16(i16 %a, i1 true) readnone
42 %val = call i64 @llvm.cttz.i64(i64 %a, i1 true) readnone
/external/llvm/test/Assembler/
Dauto_upgrade_intrinsics.ll30 declare i8 @llvm.cttz.i8(i8)
31 declare i16 @llvm.cttz.i16(i16)
32 declare i32 @llvm.cttz.i32(i32)
33 declare i42 @llvm.cttz.i42(i42) ; Not a power-of-2
35 define void @test.cttz(i8 %a, i16 %b, i32 %c, i42 %d) {
36 ; CHECK: @test.cttz
39 ; CHECK: call i8 @llvm.cttz.i8(i8 %a, i1 false)
40 call i8 @llvm.cttz.i8(i8 %a)
41 ; CHECK: call i16 @llvm.cttz.i16(i16 %b, i1 false)
42 call i16 @llvm.cttz.i16(i16 %b)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dselect-cmp-cttz-ctlz.ll4 ; a cttz/ctlz followed by a icmp + select into a single cttz/ctlz with
75 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i16 @llvm.cttz.i16(i16 %x, i1 false)
78 %0 = tail call i16 @llvm.cttz.i16(i16 %x, i1 true)
86 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %x, i1 false)
89 %0 = tail call i32 @llvm.cttz.i32(i32 %x, i1 true)
97 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i64 @llvm.cttz.i64(i64 %x, i1 false)
100 %0 = tail call i64 @llvm.cttz.i64(i64 %x, i1 true)
108 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i16 @llvm.cttz.i16(i16 %x, i1 false)
111 %0 = tail call i16 @llvm.cttz.i16(i16 %x, i1 true)
119 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %x, i1 false)
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dbmi.ll4 %tmp = tail call i32 @llvm.cttz.i32( i32 %x )
10 declare i32 @llvm.cttz.i32(i32) nounwind readnone
13 %tmp = tail call i16 @llvm.cttz.i16( i16 %x )
19 declare i16 @llvm.cttz.i16(i16) nounwind readnone
22 %tmp = tail call i64 @llvm.cttz.i64( i64 %x )
28 declare i64 @llvm.cttz.i64(i64) nounwind readnone
31 %tmp = tail call i8 @llvm.cttz.i8( i8 %x )
37 declare i8 @llvm.cttz.i8(i8) nounwind readnone
/external/llvm/test/Transforms/InstCombine/
Dselect-cmp-cttz-ctlz.ll4 ; a cttz/ctlz followed by a icmp + select into a single cttz/ctlz with
75 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i16 @llvm.cttz.i16(i16 %x, i1 false)
78 %0 = tail call i16 @llvm.cttz.i16(i16 %x, i1 true)
86 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %x, i1 false)
89 %0 = tail call i32 @llvm.cttz.i32(i32 %x, i1 true)
97 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i64 @llvm.cttz.i64(i64 %x, i1 false)
100 %0 = tail call i64 @llvm.cttz.i64(i64 %x, i1 true)
108 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i16 @llvm.cttz.i16(i16 %x, i1 false)
111 %0 = tail call i16 @llvm.cttz.i16(i16 %x, i1 true)
119 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %x, i1 false)
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/Blackfin/
D2009-08-11-RegScavenger-CSR.ll3 declare i64 @llvm.cttz.i64(i64) nounwind readnone
5 declare i16 @llvm.cttz.i16(i16) nounwind readnone
7 declare i8 @llvm.cttz.i8(i8) nounwind readnone
10 %a = call i8 @llvm.cttz.i8(i8 %A) ; <i8> [#uses=1]
11 %b = call i16 @llvm.cttz.i16(i16 %B) ; <i16> [#uses=1]
12 %d = call i64 @llvm.cttz.i64(i64 %D) ; <i64> [#uses=1]
/external/swiftshader/third_party/LLVM/test/Feature/
Dintrinsics.ll19 declare i8 @llvm.cttz.i8(i8)
21 declare i16 @llvm.cttz.i16(i16)
23 declare i32 @llvm.cttz.i32(i32)
25 declare i64 @llvm.cttz.i64(i64)
55 call i8 @llvm.cttz.i8( i8 18 ) ; <i32>:13 [#uses=0]
56 call i16 @llvm.cttz.i16( i16 19 ) ; <i32>:14 [#uses=0]
57 call i32 @llvm.cttz.i32( i32 20 ) ; <i32>:15 [#uses=0]
58 call i64 @llvm.cttz.i64( i64 21 ) ; <i32>:16 [#uses=0]
/external/swiftshader/third_party/LLVM/test/CodeGen/Generic/
Dllvm-ct-intrinsics.ll44 declare i64 @llvm.cttz.i64(i64)
46 declare i32 @llvm.cttz.i32(i32)
48 declare i16 @llvm.cttz.i16(i16)
50 declare i8 @llvm.cttz.i8(i8)
53 %a = call i8 @llvm.cttz.i8( i8 %A ) ; <i8> [#uses=1]
54 %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
55 %c = call i32 @llvm.cttz.i32( i32 %C ) ; <i32> [#uses=1]
56 %d = call i64 @llvm.cttz.i64( i64 %D ) ; <i64> [#uses=1]
/external/llvm/test/Feature/
Dintrinsics.ll19 declare i8 @llvm.cttz.i8(i8, i1)
21 declare i16 @llvm.cttz.i16(i16, i1)
23 declare i32 @llvm.cttz.i32(i32, i1)
25 declare i64 @llvm.cttz.i64(i64, i1)
54 call i8 @llvm.cttz.i8( i8 18, i1 true ) ; <i32>:13 [#uses=0]
55 call i16 @llvm.cttz.i16( i16 19, i1 true ) ; <i32>:14 [#uses=0]
56 call i32 @llvm.cttz.i32( i32 20, i1 true ) ; <i32>:15 [#uses=0]
57 call i64 @llvm.cttz.i64( i64 21, i1 true ) ; <i32>:16 [#uses=0]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Feature/
Dintrinsics.ll19 declare i8 @llvm.cttz.i8(i8, i1)
21 declare i16 @llvm.cttz.i16(i16, i1)
23 declare i32 @llvm.cttz.i32(i32, i1)
25 declare i64 @llvm.cttz.i64(i64, i1)
54 call i8 @llvm.cttz.i8( i8 18, i1 true ) ; <i32>:13 [#uses=0]
55 call i16 @llvm.cttz.i16( i16 19, i1 true ) ; <i32>:14 [#uses=0]
56 call i32 @llvm.cttz.i32( i32 20, i1 true ) ; <i32>:15 [#uses=0]
57 call i64 @llvm.cttz.i64( i64 21, i1 true ) ; <i32>:16 [#uses=0]

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