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Searched refs:db_depth_control (Results 1 – 6 of 6) sorted by relevance

/external/mesa3d/src/gallium/drivers/r600/
Dr600_state.c404 unsigned db_depth_control, alpha_test_control, alpha_ref; in r600_create_dsa_state() local
419 db_depth_control = S_028800_Z_ENABLE(state->depth.enabled) | in r600_create_dsa_state()
425 db_depth_control |= S_028800_STENCIL_ENABLE(1); in r600_create_dsa_state()
426 db_depth_control |= S_028800_STENCILFUNC(state->stencil[0].func); /* translates straight */ in r600_create_dsa_state()
427 db_depth_control |= S_028800_STENCILFAIL(r600_translate_stencil_op(state->stencil[0].fail_op)); in r600_create_dsa_state()
428 db_depth_control |= S_028800_STENCILZPASS(r600_translate_stencil_op(state->stencil[0].zpass_op)); in r600_create_dsa_state()
429 db_depth_control |= S_028800_STENCILZFAIL(r600_translate_stencil_op(state->stencil[0].zfail_op)); in r600_create_dsa_state()
432 db_depth_control |= S_028800_BACKFACE_ENABLE(1); in r600_create_dsa_state()
433 db_depth_control |= S_028800_STENCILFUNC_BF(state->stencil[1].func); /* translates straight */ in r600_create_dsa_state()
434db_depth_control |= S_028800_STENCILFAIL_BF(r600_translate_stencil_op(state->stencil[1].fail_op)); in r600_create_dsa_state()
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Devergreen_state.c415 unsigned db_depth_control, alpha_test_control, alpha_ref; in evergreen_create_dsa_state() local
430 db_depth_control = S_028800_Z_ENABLE(state->depth.enabled) | in evergreen_create_dsa_state()
436 db_depth_control |= S_028800_STENCIL_ENABLE(1); in evergreen_create_dsa_state()
437 db_depth_control |= S_028800_STENCILFUNC(state->stencil[0].func); /* translates straight */ in evergreen_create_dsa_state()
438 db_depth_control |= S_028800_STENCILFAIL(r600_translate_stencil_op(state->stencil[0].fail_op)); in evergreen_create_dsa_state()
439 db_depth_control |= S_028800_STENCILZPASS(r600_translate_stencil_op(state->stencil[0].zpass_op)); in evergreen_create_dsa_state()
440 db_depth_control |= S_028800_STENCILZFAIL(r600_translate_stencil_op(state->stencil[0].zfail_op)); in evergreen_create_dsa_state()
443 db_depth_control |= S_028800_BACKFACE_ENABLE(1); in evergreen_create_dsa_state()
444 db_depth_control |= S_028800_STENCILFUNC_BF(state->stencil[1].func); /* translates straight */ in evergreen_create_dsa_state()
445db_depth_control |= S_028800_STENCILFAIL_BF(r600_translate_stencil_op(state->stencil[1].fail_op)); in evergreen_create_dsa_state()
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/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state.c1180 unsigned db_depth_control; in si_create_dsa_state() local
1192 db_depth_control = S_028800_Z_ENABLE(state->depth.enabled) | in si_create_dsa_state()
1199 db_depth_control |= S_028800_STENCIL_ENABLE(1); in si_create_dsa_state()
1200 db_depth_control |= S_028800_STENCILFUNC(state->stencil[0].func); in si_create_dsa_state()
1206 db_depth_control |= S_028800_BACKFACE_ENABLE(1); in si_create_dsa_state()
1207 db_depth_control |= S_028800_STENCILFUNC_BF(state->stencil[1].func); in si_create_dsa_state()
1224 si_pm4_set_reg(pm4, R_028800_DB_DEPTH_CONTROL, db_depth_control); in si_create_dsa_state()
/external/mesa3d/src/amd/vulkan/
Dradv_pipeline.c713 ds->db_depth_control = S_028800_Z_ENABLE(vkds->depthTestEnable ? 1 : 0) | in radv_pipeline_init_depth_stencil_state()
720 ds->db_depth_control |= S_028800_STENCIL_ENABLE(1) | S_028800_BACKFACE_ENABLE(1); in radv_pipeline_init_depth_stencil_state()
721 ds->db_depth_control |= S_028800_STENCILFUNC(vkds->front.compareOp); in radv_pipeline_init_depth_stencil_state()
726 ds->db_depth_control |= S_028800_STENCILFUNC_BF(vkds->back.compareOp); in radv_pipeline_init_depth_stencil_state()
Dradv_private.h1137 uint32_t db_depth_control; member
Dradv_cmd_buffer.c547 radeon_set_context_reg(cmd_buffer->cs, R_028800_DB_DEPTH_CONTROL, ds->db_depth_control); in radv_emit_graphics_depth_stencil_state()