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Searched refs:dcr (Results 1 – 25 of 40) sorted by relevance

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/external/neven/
DFaceDetector_jni.cpp62 jfieldID dcr; member
98 gFaceDetectorOffsets.dcr = _env->GetFieldID(_this, "mDCR", "J"); in nativeClassInit()
148 btk_HDCR dcr = NULL; in initialize() local
150 btk_DCR_create( sdk, &dcrParam, &dcr ); in initialize()
173 _env->SetLongField(_this, gFaceDetectorOffsets.dcr, (jlong)dcr); in initialize()
185 btk_HDCR hdcr = (btk_HDCR)(_env->GetLongField(_this, gFaceDetectorOffsets.dcr)); in destroy()
197 btk_HDCR hdcr = (btk_HDCR)(_env->GetLongField(_this, gFaceDetectorOffsets.dcr)); in detect()
251 btk_HDCR hdcr = (btk_HDCR)(_env->GetLongField(_this, gFaceDetectorOffsets.dcr)); in get_face()
/external/u-boot/drivers/mmc/
Dftsdc010_mci.c195 uint32_t dcr; in ftsdc010_request() local
200 dcr = 0; in ftsdc010_request()
202 dcr |= FTSDC010_DCR_FIFO_RST; in ftsdc010_request()
204 writel(dcr, &regs->dcr); in ftsdc010_request()
217 dcr = (ffs(data->blocksize) - 1) | FTSDC010_DCR_DATA_EN; in ftsdc010_request()
219 dcr |= FTSDC010_DCR_DATA_WRITE; in ftsdc010_request()
220 writel(dcr, &regs->dcr); in ftsdc010_request()
/external/u-boot/drivers/rtc/
Dimxdi.c32 u32 dcr; /* Control Reg */ member
169 if (!(__raw_readl(&data.regs->dcr) & DCR_TCE)) { in di_init()
170 rc = DI_WRITE_WAIT(__raw_readl(&data.regs->dcr) | DCR_TCE, dcr); in di_init()
/external/u-boot/drivers/spi/
Dstm32_qspi.c24 u32 dcr; /* 0x04 */ member
212 clrsetbits_le32(&priv->regs->dcr, in _stm32_qspi_set_flash_size()
594 clrsetbits_le32(&priv->regs->dcr, in stm32_qspi_set_speed()
611 setbits_le32(&priv->regs->dcr, STM32_QSPI_DCR_CKMODE); in stm32_qspi_set_mode()
613 clrbits_le32(&priv->regs->dcr, STM32_QSPI_DCR_CKMODE); in stm32_qspi_set_mode()
/external/u-boot/board/sysam/amcore/
Damcore.c82 out_be16(&dc->dcr, 0x8200 | RC); in dram_init()
/external/u-boot/board/freescale/m5235evb/
Dm5235evb.c56 out_be16(&sdram->dcr, SDRAMC_DCR_RTIM_9CLKS | in dram_init()
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun8i_a23.c102 writel(0x40b, &mctl_phy->dcr); in mctl_init()
104 writel(0x1000040b, &mctl_phy->dcr); in mctl_init()
Ddram_sun4i.c153 if ((readl(&dram->dcr) & DRAM_DCR_BUS_WIDTH_MASK) == in mctl_get_number_of_lanes()
618 writel(reg_val, &dram->dcr); in dramc_init_helper()
/external/u-boot/arch/nds32/lib/
Dasm-offsets.c61 OFFSET(DWCDDR21MCTL_DCR, dwcddr21mctl, dcr); /* 0x04 */ in main()
/external/u-boot/drivers/timer/
Dstm32_timer.c44 u32 dcr; member
/external/u-boot/arch/m68k/include/asm/
Dimmap_5307.h100 u16 dcr; member
Dimmap_5235.h91 u16 dcr; /* 0x00 Control register */ member
Dimmap_5275.h110 u32 dcr; member
/external/u-boot/include/faraday/
Dftsdc010.h23 unsigned int dcr; /* 0x1c - data control reg */ member
/external/u-boot/arch/m68k/include/asm/coldfire/
Dlcd.h26 u32 dcr; /* 0x30 DMA Control Register */ member
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Ddram_sun4i.h16 u32 dcr; /* 0x04 dram configuration register */ member
Ddram_sun9i.h105 u32 dcr; /* 0x88 DRAM configuration register */ member
Ddram_sun8i_a23.h180 u32 dcr; /* 0x44 */ member
Ddram_sun6i.h169 u32 dcr; /* 0x30 */ member
/external/u-boot/drivers/ram/rockchip/
Dsdram_rk3288.c325 clrsetbits_le32(&publ->dcr, DDRMD_MASK << DDRMD_SHIFT, in phy_cfg()
341 clrsetbits_le32(&publ->dcr, DDRMD_MASK << DDRMD_SHIFT, in phy_cfg()
581 clrsetbits_le32(&publ->dcr, PDQ_MASK << PDQ_SHIFT, in dram_cfg_rbc()
584 clrbits_le32(&publ->dcr, PDQ_MASK << PDQ_SHIFT); in dram_cfg_rbc()
Dsdram_rk3188.c283 clrsetbits_le32(&publ->dcr, DDRMD_MASK << DDRMD_SHIFT, in phy_cfg()
524 clrsetbits_le32(&publ->dcr, PDQ_MASK << PDQ_SHIFT, in dram_cfg_rbc()
527 clrbits_le32(&publ->dcr, PDQ_MASK << PDQ_SHIFT); in dram_cfg_rbc()
/external/u-boot/drivers/ram/stm32mp1/
Dstm32mp1_ddr.h121 u32 dcr; member
Dstm32mp1_ddr_regs.h153 u32 dcr; /* 0x30 DRAM Configuration*/ member
/external/u-boot/include/synopsys/
Ddwcddr21mctl.h16 unsigned int dcr; /* DRAM Configuration */ member
/external/u-boot/arch/arm/include/asm/arch-rockchip/
Dddr_rk3288.h177 u32 dcr; member

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