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Searched refs:dpll_regs (Results 1 – 8 of 8) sorted by relevance

/external/u-boot/arch/arm/mach-omap2/am33xx/
Dclock.c17 static void setup_post_dividers(const struct dpll_regs *dpll_regs, in setup_post_dividers() argument
22 writel(params->m2, dpll_regs->cm_div_m2_dpll); in setup_post_dividers()
24 writel(params->m3, dpll_regs->cm_div_m3_dpll); in setup_post_dividers()
26 writel(params->m4, dpll_regs->cm_div_m4_dpll); in setup_post_dividers()
28 writel(params->m5, dpll_regs->cm_div_m5_dpll); in setup_post_dividers()
30 writel(params->m6, dpll_regs->cm_div_m6_dpll); in setup_post_dividers()
33 static inline void do_lock_dpll(const struct dpll_regs *dpll_regs) in do_lock_dpll() argument
35 clrsetbits_le32(dpll_regs->cm_clkmode_dpll, in do_lock_dpll()
40 static inline void wait_for_lock(const struct dpll_regs *dpll_regs) in wait_for_lock() argument
43 (void *)dpll_regs->cm_idlest_dpll, LDELAY)) { in wait_for_lock()
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Dclock_am33xx.c24 const struct dpll_regs dpll_mpu_regs = {
31 const struct dpll_regs dpll_core_regs = {
40 const struct dpll_regs dpll_per_regs = {
47 const struct dpll_regs dpll_ddr_regs = {
54 const struct dpll_regs dpll_disp_regs = {
Dclock_am43xx.c22 const struct dpll_regs dpll_mpu_regs = {
29 const struct dpll_regs dpll_core_regs = {
38 const struct dpll_regs dpll_per_regs = {
45 const struct dpll_regs dpll_ddr_regs = {
/external/u-boot/arch/arm/mach-omap2/
Dclocks-common.c75 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base; in setup_post_dividers() local
79 writel(params->m2, &dpll_regs->cm_div_m2_dpll); in setup_post_dividers()
81 writel(params->m3, &dpll_regs->cm_div_m3_dpll); in setup_post_dividers()
83 writel(params->m4_h11, &dpll_regs->cm_div_m4_h11_dpll); in setup_post_dividers()
85 writel(params->m5_h12, &dpll_regs->cm_div_m5_h12_dpll); in setup_post_dividers()
87 writel(params->m6_h13, &dpll_regs->cm_div_m6_h13_dpll); in setup_post_dividers()
89 writel(params->m7_h14, &dpll_regs->cm_div_m7_h14_dpll); in setup_post_dividers()
91 writel(params->h21, &dpll_regs->cm_div_h21_dpll); in setup_post_dividers()
93 writel(params->h22, &dpll_regs->cm_div_h22_dpll); in setup_post_dividers()
95 writel(params->h23, &dpll_regs->cm_div_h23_dpll); in setup_post_dividers()
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/external/u-boot/arch/arm/include/asm/arch-am33xx/
Dclock.h90 struct dpll_regs { struct
102 extern const struct dpll_regs dpll_mpu_regs; argument
103 extern const struct dpll_regs dpll_core_regs;
104 extern const struct dpll_regs dpll_per_regs;
105 extern const struct dpll_regs dpll_ddr_regs;
106 extern const struct dpll_regs dpll_disp_regs;
121 void do_setup_dpll(const struct dpll_regs *, const struct dpll_params *);
/external/u-boot/board/siemens/rut/
Dboard.c350 static struct dpll_regs dpll_lcd_regs = {
356 static int get_clk(struct dpll_regs *dpll_regs) in get_clk() argument
362 val = readl(dpll_regs->cm_clksel_dpll); in get_clk()
/external/u-boot/board/siemens/pxm2/
Dboard.c357 static struct dpll_regs dpll_lcd_regs = {
372 static int get_clk(struct dpll_regs *dpll_regs) in get_clk() argument
378 val = readl(dpll_regs->cm_clksel_dpll); in get_clk()
/external/u-boot/arch/arm/include/asm/
Domap_common.h502 struct dpll_regs { struct