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Searched refs:dsa_state (Results 1 – 20 of 20) sorted by relevance

/external/mesa3d/src/gallium/drivers/r300/
Dr300_render_stencilref.c47 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; in r300_stencilref_needed()
59 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; in r300_stencilref_begin()
77 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; in r300_stencilref_switch_side()
84 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_stencilref_switch_side()
92 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; in r300_stencilref_end()
100 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_stencilref_end()
Dr300_hyperz.c43 struct r300_dsa_state *dsa = r300->dsa_state.state; in r300_get_hiz_func()
65 struct r300_dsa_state *dsa = r300->dsa_state.state; in r300_get_sc_hz_max()
73 struct r300_dsa_state *dsa = r300->dsa_state.state; in r300_is_hiz_func_valid()
100 struct r300_dsa_state *dsa = r300->dsa_state.state; in r300_hiz_allowed()
136 struct r300_dsa_state *dsa = r300->dsa_state.state; in r300_update_hyperz()
290 if (r300_dsa_writes_depth_stencil(r300->dsa_state.state) && in r300_update_ztop()
291 (r300_dsa_alpha_test_enabled(r300->dsa_state.state) || /* (1) */ in r300_update_ztop()
Dr300_state.c554 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_bind_blend_state()
789 (struct r300_dsa_state*)r300->dsa_state.state; in r300_dsa_inject_stencilref()
812 UPDATE_STATE(state, r300->dsa_state); in r300_bind_dsa_state()
833 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_set_stencil_ref()
870 r300_mark_atom_dirty(r300, &r300->dsa_state); /* for AlphaRef */ in r300_mark_fb_state_dirty()
960 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_set_framebuffer_state()
1378 r300_mark_atom_dirty(r300, &r300->dsa_state); in r300_bind_rs_state()
Dr300_context.h506 struct r300_atom dsa_state; member
Dr300_context.c181 R300_INIT_ATOM(dsa_state, is_r500 ? 10 : 6); in r300_setup_atoms()
Dr300_blit.c64 util_blitter_save_depth_stencil_alpha(r300->blitter, r300->dsa_state.state); in r300_blitter_begin()
/external/mesa3d/src/gallium/drivers/virgl/
Dvirgl_encode.c119 const struct pipe_depth_stencil_alpha_state *dsa_state) in virgl_encode_dsa_state() argument
126 tmp = VIRGL_OBJ_DSA_S0_DEPTH_ENABLE(dsa_state->depth.enabled) | in virgl_encode_dsa_state()
127 VIRGL_OBJ_DSA_S0_DEPTH_WRITEMASK(dsa_state->depth.writemask) | in virgl_encode_dsa_state()
128 VIRGL_OBJ_DSA_S0_DEPTH_FUNC(dsa_state->depth.func) | in virgl_encode_dsa_state()
129 VIRGL_OBJ_DSA_S0_ALPHA_ENABLED(dsa_state->alpha.enabled) | in virgl_encode_dsa_state()
130 VIRGL_OBJ_DSA_S0_ALPHA_FUNC(dsa_state->alpha.func); in virgl_encode_dsa_state()
134 tmp = VIRGL_OBJ_DSA_S1_STENCIL_ENABLED(dsa_state->stencil[i].enabled) | in virgl_encode_dsa_state()
135 VIRGL_OBJ_DSA_S1_STENCIL_FUNC(dsa_state->stencil[i].func) | in virgl_encode_dsa_state()
136 VIRGL_OBJ_DSA_S1_STENCIL_FAIL_OP(dsa_state->stencil[i].fail_op) | in virgl_encode_dsa_state()
137 VIRGL_OBJ_DSA_S1_STENCIL_ZPASS_OP(dsa_state->stencil[i].zpass_op) | in virgl_encode_dsa_state()
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Dvirgl_encode.h195 const struct pipe_depth_stencil_alpha_state *dsa_state);
Dvirgl_context.c286 void *dsa_state) in virgl_delete_depth_stencil_alpha_state() argument
289 uint32_t handle = (unsigned long)dsa_state; in virgl_delete_depth_stencil_alpha_state()
/external/virglrenderer/tests/
Dtestvirgl_encode.c112 const struct pipe_depth_stencil_alpha_state *dsa_state) in virgl_encode_dsa_state() argument
119 tmp = VIRGL_OBJ_DSA_S0_DEPTH_ENABLE(dsa_state->depth.enabled) | in virgl_encode_dsa_state()
120 VIRGL_OBJ_DSA_S0_DEPTH_WRITEMASK(dsa_state->depth.writemask) | in virgl_encode_dsa_state()
121 VIRGL_OBJ_DSA_S0_DEPTH_FUNC(dsa_state->depth.func) | in virgl_encode_dsa_state()
122 VIRGL_OBJ_DSA_S0_ALPHA_ENABLED(dsa_state->alpha.enabled) | in virgl_encode_dsa_state()
123 VIRGL_OBJ_DSA_S0_ALPHA_FUNC(dsa_state->alpha.func); in virgl_encode_dsa_state()
127 tmp = VIRGL_OBJ_DSA_S1_STENCIL_ENABLED(dsa_state->stencil[i].enabled) | in virgl_encode_dsa_state()
128 VIRGL_OBJ_DSA_S1_STENCIL_FUNC(dsa_state->stencil[i].func) | in virgl_encode_dsa_state()
129 VIRGL_OBJ_DSA_S1_STENCIL_FAIL_OP(dsa_state->stencil[i].fail_op) | in virgl_encode_dsa_state()
130 VIRGL_OBJ_DSA_S1_STENCIL_ZPASS_OP(dsa_state->stencil[i].zpass_op) | in virgl_encode_dsa_state()
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Dtestvirgl_encode.h184 const struct pipe_depth_stencil_alpha_state *dsa_state);
/external/virglrenderer/src/
Dvrend_decode.c473 struct pipe_depth_stencil_alpha_state *dsa_state; in vrend_decode_create_dsa() local
479 dsa_state = CALLOC_STRUCT(pipe_depth_stencil_alpha_state); in vrend_decode_create_dsa()
480 if (!dsa_state) in vrend_decode_create_dsa()
484 dsa_state->depth.enabled = tmp & 0x1; in vrend_decode_create_dsa()
485 dsa_state->depth.writemask = (tmp >> 1) & 0x1; in vrend_decode_create_dsa()
486 dsa_state->depth.func = (tmp >> 2) & 0x7; in vrend_decode_create_dsa()
488 dsa_state->alpha.enabled = (tmp >> 8) & 0x1; in vrend_decode_create_dsa()
489 dsa_state->alpha.func = (tmp >> 9) & 0x7; in vrend_decode_create_dsa()
493 dsa_state->stencil[i].enabled = tmp & 0x1; in vrend_decode_create_dsa()
494 dsa_state->stencil[i].func = (tmp >> 1) & 0x7; in vrend_decode_create_dsa()
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Dvrend_renderer.c498 struct pipe_depth_stencil_alpha_state dsa_state; member
2704 key->add_alpha_test = ctx->sub->dsa_state.alpha.enabled; in vrend_fill_shader_key()
2705 key->alpha_test = ctx->sub->dsa_state.alpha.func; in vrend_fill_shader_key()
2706 key->alpha_ref_val = ctx->sub->dsa_state.alpha.ref_value; in vrend_fill_shader_key()
3209 if (!ctx->sub->dsa_state.depth.writemask) in vrend_clear()
3215 glStencilMaskSeparate(GL_FRONT, ctx->sub->dsa_state.stencil[0].writemask); in vrend_clear()
3216 glStencilMaskSeparate(GL_BACK, ctx->sub->dsa_state.stencil[1].writemask); in vrend_clear()
4375 struct pipe_depth_stencil_alpha_state *state = &ctx->sub->dsa_state; in vrend_hw_emit_dsa()
4402 memset(&ctx->sub->dsa_state, 0, sizeof(ctx->sub->dsa_state)); in vrend_object_bind_dsa()
4420 ctx->sub->dsa_state = *state; in vrend_object_bind_dsa()
/external/mesa3d/src/gallium/state_trackers/nine/
Dnine_pipe.c30 nine_convert_dsa_state(struct pipe_depth_stencil_alpha_state *dsa_state, in nine_convert_dsa_state() argument
69 *dsa_state = dsa; in nine_convert_dsa_state()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_hw_context.c387 if (ctx->dsa_state.cso) in r600_begin_new_cs()
388 r600_mark_atom_dirty(ctx, &ctx->dsa_state.atom); in r600_begin_new_cs()
Dr600_state_common.c308 struct r600_dsa_state *dsa = (struct r600_dsa_state*)rctx->dsa_state.cso; in r600_set_pipe_stencil_ref()
333 r600_set_cso_state_with_cb(rctx, &rctx->dsa_state, NULL, NULL); in r600_bind_dsa_state()
337 r600_set_cso_state_with_cb(rctx, &rctx->dsa_state, dsa, &dsa->buffer); in r600_bind_dsa_state()
527 if (rctx->dsa_state.cso == state) { in r600_delete_dsa_state()
Dr600_pipe.h523 struct r600_cso_state dsa_state; member
Dr600_blit.c77 util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso); in r600_blitter_begin()
Dr600_state.c3080 r600_init_atom(rctx, &rctx->dsa_state.atom, id++, r600_emit_cso_state, 0); in r600_init_state_functions()
Devergreen_state.c4308 r600_init_atom(rctx, &rctx->dsa_state.atom, id++, r600_emit_cso_state, 0); in evergreen_init_state_functions()