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Searched refs:dst_layout (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_meta_resolve_fs.c218 for (unsigned dst_layout = 0; dst_layout < RADV_META_DST_LAYOUT_COUNT; ++dst_layout) { in create_resolve_pipeline() local
219 VkImageLayout layout = radv_meta_dst_layout_to_layout(dst_layout); in create_resolve_pipeline()
249 }, &device->meta_state.alloc, rp + dst_layout); in create_resolve_pipeline()
458 unsigned dst_layout = radv_meta_dst_layout_from_layout(dest_image_layout); in radv_meta_resolve_fragment_image() local
474 rp = device->meta_state.resolve_fragment.rc[samples_log2].render_pass[fs_key][dst_layout]; in radv_meta_resolve_fragment_image()
Dradv_meta_blit2d.c264 unsigned dst_layout = radv_meta_dst_layout_from_layout(dst->current_layout); in radv_meta_blit2d_normal_dst() local
269 .renderPass = device->meta_state.blit2d.render_passes[fs_key][dst_layout], in radv_meta_blit2d_normal_dst()
707 for (unsigned dst_layout = 0; dst_layout < RADV_META_DST_LAYOUT_COUNT; ++dst_layout) { in blit2d_init_color_pipeline() local
708 if (!device->meta_state.blit2d.render_passes[fs_key][dst_layout]) { in blit2d_init_color_pipeline()
709 VkImageLayout layout = radv_meta_dst_layout_to_layout(dst_layout); in blit2d_init_color_pipeline()
740 }, &device->meta_state.alloc, &device->meta_state.blit2d.render_passes[fs_key][dst_layout]); in blit2d_init_color_pipeline()
Dradv_cmd_buffer.c43 VkImageLayout dst_layout,
3918 VkImageLayout dst_layout, in radv_handle_depth_image_transition() argument
3924 if (dst_layout == VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL && in radv_handle_depth_image_transition()
3932 radv_layout_has_htile(image, dst_layout, dst_queue_mask)) { in radv_handle_depth_image_transition()
3936 radv_layout_is_htile_compressed(image, dst_layout, dst_queue_mask)) { in radv_handle_depth_image_transition()
3940 !radv_layout_is_htile_compressed(image, dst_layout, dst_queue_mask)) { in radv_handle_depth_image_transition()
3974 VkImageLayout dst_layout, in radv_handle_cmask_image_transition() argument
3985 !radv_layout_can_fast_clear(image, dst_layout, dst_queue_mask)) { in radv_handle_cmask_image_transition()
4009 VkImageLayout dst_layout, in radv_handle_dcc_image_transition() argument
4018 radv_layout_dcc_compressed(image, dst_layout, dst_queue_mask) ? in radv_handle_dcc_image_transition()
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Dradv_meta_blit.c328 unsigned dst_layout = radv_meta_dst_layout_from_layout(dest_image_layout); in meta_emit_blit() local
333 .renderPass = device->meta_state.blit.render_pass[fs_key][dst_layout], in meta_emit_blit()
/external/mesa3d/src/intel/blorp/
Dblorp_priv.h263 enum isl_msaa_layout dst_layout; member
Dblorp_blit.c1119 assert((key->dst_layout == ISL_MSAA_LAYOUT_NONE) == in brw_blorp_build_nir_shader()
1147 key->rt_layout != key->dst_layout) { in brw_blorp_build_nir_shader()
1155 key->dst_layout); in brw_blorp_build_nir_shader()
1651 wm_prog_key->dst_layout = params->dst.surf.msaa_layout; in try_blorp_blit()
/external/mesa3d/src/intel/vulkan/
Danv_descriptor_set.c791 const struct anv_descriptor_set_binding_layout *dst_layout = in anv_UpdateDescriptorSets() local
794 &dst->descriptors[dst_layout->descriptor_index]; in anv_UpdateDescriptorSets()