/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r3/ |
D | valid-xfail-mips32r3.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r5/ |
D | valid-xfail-mips32r5.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r2/ |
D | valid-xfail-mips32r2.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r3/ |
D | valid-xfail-mips64r3.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
|
/external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
D | valid-xfail-mips64r3.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r5/ |
D | valid-xfail-mips64r5.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
|
/external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
D | valid-xfail-mips64r2.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
|
/external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
D | valid-xfail-mips64r5.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r2/ |
D | valid-xfail-mips64r2.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
|
/external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
D | valid-xfail-mips32r2.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
D | valid-xfail-mips32r5.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
D | valid-xfail-mips32r3.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32/ |
D | valid.s | 15 add.s $f8,$f21,$f24 48 …c.eq.s $fcc5, $f24, $f17 # CHECK: c.eq.s $fcc5, $f24, $f17 # encoding: [0x46,0x11,0… 52 …c.le.s $fcc6, $f24, $f4 # CHECK: c.le.s $fcc6, $f24, $f4 # encoding: [0x46,0x04,0… 61 …c.ngt.d $fcc4, $f24, $f6 # CHECK: c.ngt.d $fcc4, $f24, $f6 # encoding: [0x46,0x26,0… 71 …c.ueq.d $fcc4, $f12, $f24 # CHECK: c.ueq.d $fcc4, $f12, $f24 # encoding: [0x46,0x38,0… 73 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0… 76 …c.ult.s $fcc7, $f24, $f10 # CHECK: c.ult.s $fcc7, $f24, $f10 # encoding: [0x46,0x0a,0… 77 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0… 79 … ceil.w.d $f11,$f24 # CHECK: ceil.w.d $f11, $f24 # encoding: [0x46,0x20,0xc2,0xce] 98 cvt.w.s $f20,$f24
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r5/ |
D | valid.s | 15 add.s $f8,$f21,$f24 48 …c.eq.s $fcc5, $f24, $f17 # CHECK: c.eq.s $fcc5, $f24, $f17 # encoding: [0x46,0x11,0… 52 …c.le.s $fcc6, $f24, $f4 # CHECK: c.le.s $fcc6, $f24, $f4 # encoding: [0x46,0x04,0… 61 …c.ngt.d $fcc4, $f24, $f6 # CHECK: c.ngt.d $fcc4, $f24, $f6 # encoding: [0x46,0x26,0… 71 …c.ueq.d $fcc4, $f12, $f24 # CHECK: c.ueq.d $fcc4, $f12, $f24 # encoding: [0x46,0x38,0… 73 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0… 76 …c.ult.s $fcc7, $f24, $f10 # CHECK: c.ult.s $fcc7, $f24, $f10 # encoding: [0x46,0x0a,0… 77 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0… 79 … ceil.w.d $f11,$f24 # CHECK: ceil.w.d $f11, $f24 # encoding: [0x46,0x20,0xc2,0xce] 93 cvt.l.d $f24,$f15 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r3/ |
D | valid.s | 15 add.s $f8,$f21,$f24 48 …c.eq.s $fcc5, $f24, $f17 # CHECK: c.eq.s $fcc5, $f24, $f17 # encoding: [0x46,0x11,0… 52 …c.le.s $fcc6, $f24, $f4 # CHECK: c.le.s $fcc6, $f24, $f4 # encoding: [0x46,0x04,0… 61 …c.ngt.d $fcc4, $f24, $f6 # CHECK: c.ngt.d $fcc4, $f24, $f6 # encoding: [0x46,0x26,0… 71 …c.ueq.d $fcc4, $f12, $f24 # CHECK: c.ueq.d $fcc4, $f12, $f24 # encoding: [0x46,0x38,0… 73 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0… 76 …c.ult.s $fcc7, $f24, $f10 # CHECK: c.ult.s $fcc7, $f24, $f10 # encoding: [0x46,0x0a,0… 77 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0… 79 … ceil.w.d $f11,$f24 # CHECK: ceil.w.d $f11, $f24 # encoding: [0x46,0x20,0xc2,0xce] 93 cvt.l.d $f24,$f15 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/ |
D | valid.s | 15 add.s $f8,$f21,$f24 48 …c.eq.s $fcc5, $f24, $f17 # CHECK: c.eq.s $fcc5, $f24, $f17 # encoding: [0x46,0x11,0… 52 …c.le.s $fcc6, $f24, $f4 # CHECK: c.le.s $fcc6, $f24, $f4 # encoding: [0x46,0x04,0… 61 …c.ngt.d $fcc4, $f24, $f6 # CHECK: c.ngt.d $fcc4, $f24, $f6 # encoding: [0x46,0x26,0… 71 …c.ueq.d $fcc4, $f12, $f24 # CHECK: c.ueq.d $fcc4, $f12, $f24 # encoding: [0x46,0x38,0… 73 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0… 76 …c.ult.s $fcc7, $f24, $f10 # CHECK: c.ult.s $fcc7, $f24, $f10 # encoding: [0x46,0x0a,0… 77 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0… 79 … ceil.w.d $f11, $f24 # CHECK: ceil.w.d $f11, $f24 # encoding: [0x46,0x20,0xc2,0xce] 93 cvt.l.d $f24,$f15 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64/ |
D | valid.s | 12 add.s $f8,$f21,$f24 45 …c.eq.s $fcc5, $f24, $f17 # CHECK: c.eq.s $fcc5, $f24, $f17 # encoding: [0x46,0x11,0… 49 …c.le.s $fcc6, $f24, $f4 # CHECK: c.le.s $fcc6, $f24, $f4 # encoding: [0x46,0x04,0… 58 …c.ngt.d $fcc4, $f24, $f6 # CHECK: c.ngt.d $fcc4, $f24, $f6 # encoding: [0x46,0x26,0… 68 …c.ueq.d $fcc4, $f12, $f24 # CHECK: c.ueq.d $fcc4, $f12, $f24 # encoding: [0x46,0x38,0… 70 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0… 73 …c.ult.s $fcc7, $f24, $f10 # CHECK: c.ult.s $fcc7, $f24, $f10 # encoding: [0x46,0x0a,0… 74 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0… 92 … cvt.l.d $f24,$f15 # CHECK: cvt.l.d $f24, $f15 # encoding: [0x46,0x20,0x7e,0x25] 104 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24] [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/ |
D | valid.s | 12 add.s $f8,$f21,$f24 45 …c.eq.s $fcc5, $f24, $f17 # CHECK: c.eq.s $fcc5, $f24, $f17 # encoding: [0x46,0x11,0… 49 …c.le.s $fcc6, $f24, $f4 # CHECK: c.le.s $fcc6, $f24, $f4 # encoding: [0x46,0x04,0… 58 …c.ngt.d $fcc4, $f24, $f6 # CHECK: c.ngt.d $fcc4, $f24, $f6 # encoding: [0x46,0x26,0… 68 …c.ueq.d $fcc4, $f12, $f24 # CHECK: c.ueq.d $fcc4, $f12, $f24 # encoding: [0x46,0x38,0… 70 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0… 73 …c.ult.s $fcc7, $f24, $f10 # CHECK: c.ult.s $fcc7, $f24, $f10 # encoding: [0x46,0x0a,0… 74 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0… 90 … cvt.l.d $f24,$f15 # CHECK: cvt.l.d $f24, $f15 # encoding: [0x46,0x20,0x7e,0x25] 102 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24] [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips5/ |
D | valid.s | 12 add.s $f8,$f21,$f24 45 …c.eq.s $fcc5, $f24, $f17 # CHECK: c.eq.s $fcc5, $f24, $f17 # encoding: [0x46,0x11,0… 49 …c.le.s $fcc6, $f24, $f4 # CHECK: c.le.s $fcc6, $f24, $f4 # encoding: [0x46,0x04,0… 58 …c.ngt.d $fcc4, $f24, $f6 # CHECK: c.ngt.d $fcc4, $f24, $f6 # encoding: [0x46,0x26,0… 68 …c.ueq.d $fcc4, $f12, $f24 # CHECK: c.ueq.d $fcc4, $f12, $f24 # encoding: [0x46,0x38,0… 70 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0… 73 …c.ult.s $fcc7, $f24, $f10 # CHECK: c.ult.s $fcc7, $f24, $f10 # encoding: [0x46,0x0a,0… 74 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0… 90 … cvt.l.d $f24,$f15 # CHECK: cvt.l.d $f24, $f15 # encoding: [0x46,0x20,0x7e,0x25] 102 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24] [all …]
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/external/llvm/test/MC/Disassembler/Mips/mips32/ |
D | valid-xfail-mips32.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32/ |
D | valid-xfail-mips32.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24
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/external/llvm/test/MC/Disassembler/Mips/mips4/ |
D | valid-xfail-mips4.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 38 0x4f 0x04 0x98 0x78 # CHECK: nmsub.s $f1, $f24, $f19, $f4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r3/ |
D | valid.s | 12 add.s $f8,$f21,$f24 45 …c.eq.s $fcc5, $f24, $f17 # CHECK: c.eq.s $fcc5, $f24, $f17 # encoding: [0x46,0x11,0… 49 …c.le.s $fcc6, $f24, $f4 # CHECK: c.le.s $fcc6, $f24, $f4 # encoding: [0x46,0x04,0… 58 …c.ngt.d $fcc4, $f24, $f6 # CHECK: c.ngt.d $fcc4, $f24, $f6 # encoding: [0x46,0x26,0… 68 …c.ueq.d $fcc4, $f12, $f24 # CHECK: c.ueq.d $fcc4, $f12, $f24 # encoding: [0x46,0x38,0… 70 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0… 73 …c.ult.s $fcc7, $f24, $f10 # CHECK: c.ult.s $fcc7, $f24, $f10 # encoding: [0x46,0x0a,0… 74 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0… 92 … cvt.l.d $f24,$f15 # CHECK: cvt.l.d $f24, $f15 # encoding: [0x46,0x20,0x7e,0x25] 104 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24] [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r5/ |
D | valid.s | 12 add.s $f8,$f21,$f24 45 …c.eq.s $fcc5, $f24, $f17 # CHECK: c.eq.s $fcc5, $f24, $f17 # encoding: [0x46,0x11,0… 49 …c.le.s $fcc6, $f24, $f4 # CHECK: c.le.s $fcc6, $f24, $f4 # encoding: [0x46,0x04,0… 58 …c.ngt.d $fcc4, $f24, $f6 # CHECK: c.ngt.d $fcc4, $f24, $f6 # encoding: [0x46,0x26,0… 68 …c.ueq.d $fcc4, $f12, $f24 # CHECK: c.ueq.d $fcc4, $f12, $f24 # encoding: [0x46,0x38,0… 70 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0… 73 …c.ult.s $fcc7, $f24, $f10 # CHECK: c.ult.s $fcc7, $f24, $f10 # encoding: [0x46,0x0a,0… 74 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0… 92 … cvt.l.d $f24,$f15 # CHECK: cvt.l.d $f24, $f15 # encoding: [0x46,0x20,0x7e,0x25] 104 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24] [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r2/ |
D | valid.s | 12 add.s $f8,$f21,$f24 45 …c.eq.s $fcc5, $f24, $f17 # CHECK: c.eq.s $fcc5, $f24, $f17 # encoding: [0x46,0x11,0… 49 …c.le.s $fcc6, $f24, $f4 # CHECK: c.le.s $fcc6, $f24, $f4 # encoding: [0x46,0x04,0… 58 …c.ngt.d $fcc4, $f24, $f6 # CHECK: c.ngt.d $fcc4, $f24, $f6 # encoding: [0x46,0x26,0… 68 …c.ueq.d $fcc4, $f12, $f24 # CHECK: c.ueq.d $fcc4, $f12, $f24 # encoding: [0x46,0x38,0… 70 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0… 73 …c.ult.s $fcc7, $f24, $f10 # CHECK: c.ult.s $fcc7, $f24, $f10 # encoding: [0x46,0x0a,0… 74 …c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x46,0x38,0… 92 … cvt.l.d $f24,$f15 # CHECK: cvt.l.d $f24, $f15 # encoding: [0x46,0x20,0x7e,0x25] 104 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24] [all …]
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