| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 169 fcvtps h22, h13
170 fcvtps s22, s13
171 fcvtps d21, d14
|
| D | arm64-fp-encoding.s | 362 fcvtps w1, h2
363 fcvtps w1, s2
364 fcvtps w1, d2
365 fcvtps x1, h2
366 fcvtps x1, s2
367 fcvtps x1, d2
369 ; FP16: fcvtps w1, h2 ; encoding: [0x41,0x00,0xe8,0x1e]
371 ; NO-FP16-NEXT: fcvtps w1, h2
372 ; CHECK: fcvtps w1, s2 ; encoding: [0x41,0x00,0x28,0x1e]
373 ; CHECK: fcvtps w1, d2 ; encoding: [0x41,0x00,0x68,0x1e]
[all …]
|
| D | neon-simd-misc.s | 573 fcvtps v4.4h, v0.4h
574 fcvtps v6.8h, v8.8h
575 fcvtps v6.4s, v8.4s
576 fcvtps v6.2d, v8.2d
577 fcvtps v4.2s, v0.2s
|
| D | fullfp16-neon-neg.s | 242 fcvtps h22, h13
338 fcvtps v4.4h, v0.4h
340 fcvtps v6.8h, v8.8h
|
| D | arm64-advsimd.s | 876 fcvtps.2s v0, v0
877 fcvtps.4s v0, v0
878 fcvtps.2d v0, v0
879 fcvtps s0, s0
880 fcvtps d0, d0 define
882 ; CHECK: fcvtps.2s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x0e]
883 ; CHECK: fcvtps.4s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x4e]
884 ; CHECK: fcvtps.2d v0, v0 ; encoding: [0x00,0xa8,0xe1,0x4e]
885 ; CHECK: fcvtps s0, s0 ; encoding: [0x00,0xa8,0xa1,0x5e]
886 ; CHECK: fcvtps d0, d0 ; encoding: [0x00,0xa8,0xe1,0x5e]
|
| D | neon-diagnostics.s | 5841 fcvtps v0.16b, v31.16b
5842 fcvtps v2.8h, v4.8h
5843 fcvtps v1.8b, v9.8b
5844 fcvtps v13.4h, v21.4h
7036 fcvtps s0, d0
7037 fcvtps d0, s0 define
|
| D | basic-a64-instructions.s | 2060 fcvtps wzr, s9
2061 fcvtps x12, s20
2114 fcvtps wzr, d9
2115 fcvtps x12, d20
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 169 fcvtps h22, h13
170 fcvtps s22, s13
171 fcvtps d21, d14
|
| D | arm64-fp-encoding.s | 362 fcvtps w1, h2
363 fcvtps w1, s2
364 fcvtps w1, d2
365 fcvtps x1, h2
366 fcvtps x1, s2
367 fcvtps x1, d2
369 ; FP16: fcvtps w1, h2 ; encoding: [0x41,0x00,0xe8,0x1e]
371 ; NO-FP16-NEXT: fcvtps w1, h2
372 ; CHECK: fcvtps w1, s2 ; encoding: [0x41,0x00,0x28,0x1e]
373 ; CHECK: fcvtps w1, d2 ; encoding: [0x41,0x00,0x68,0x1e]
[all …]
|
| D | neon-simd-misc.s | 573 fcvtps v4.4h, v0.4h
574 fcvtps v6.8h, v8.8h
575 fcvtps v6.4s, v8.4s
576 fcvtps v6.2d, v8.2d
577 fcvtps v4.2s, v0.2s
|
| D | fullfp16-neon-neg.s | 242 fcvtps h22, h13
338 fcvtps v4.4h, v0.4h
340 fcvtps v6.8h, v8.8h
|
| D | arm64-advsimd.s | 876 fcvtps.2s v0, v0
877 fcvtps.4s v0, v0
878 fcvtps.2d v0, v0
879 fcvtps s0, s0
880 fcvtps d0, d0 define
882 ; CHECK: fcvtps.2s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x0e]
883 ; CHECK: fcvtps.4s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x4e]
884 ; CHECK: fcvtps.2d v0, v0 ; encoding: [0x00,0xa8,0xe1,0x4e]
885 ; CHECK: fcvtps s0, s0 ; encoding: [0x00,0xa8,0xa1,0x5e]
886 ; CHECK: fcvtps d0, d0 ; encoding: [0x00,0xa8,0xe1,0x5e]
|
| D | neon-diagnostics.s | 5901 fcvtps v0.16b, v31.16b
5902 fcvtps v2.8h, v4.8h
5903 fcvtps v1.8b, v9.8b
5904 fcvtps v13.4h, v21.4h
7267 fcvtps s0, d0
7268 fcvtps d0, s0 define
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-cvt.ll | 248 ;CHECK: fcvtps w0, s0
250 %tmp3 = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float %A)
256 ;CHECK: fcvtps x0, s0
258 %tmp3 = call i64 @llvm.aarch64.neon.fcvtps.i64.f32(float %A)
264 ;CHECK: fcvtps w0, d0
266 %tmp3 = call i32 @llvm.aarch64.neon.fcvtps.i32.f64(double %A)
272 ;CHECK: fcvtps x0, d0
274 %tmp3 = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double %A)
278 declare i32 @llvm.aarch64.neon.fcvtps.i32.f32(float) nounwind readnone
279 declare i64 @llvm.aarch64.neon.fcvtps.i64.f32(float) nounwind readnone
[all …]
|
| D | round-conv.ll | 84 ; CHECK: fcvtps w0, s0
94 ; CHECK: fcvtps x0, s0
104 ; CHECK: fcvtps w0, d0
114 ; CHECK: fcvtps x0, d0
|
| D | arm64-vcvt.ll | 130 ;CHECK: fcvtps.2s v0, v0
132 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float> %A)
139 ;CHECK: fcvtps.4s v0, v0
141 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtps.v4i32.v4f32(<4 x float> %A)
148 ;CHECK: fcvtps.2d v0, v0
150 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtps.v2i64.v2f64(<2 x double> %A)
154 declare <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float>) nounwind readnone
155 declare <4 x i32> @llvm.aarch64.neon.fcvtps.v4i32.v4f32(<4 x float>) nounwind readnone
156 declare <2 x i64> @llvm.aarch64.neon.fcvtps.v2i64.v2f64(<2 x double>) nounwind readnone
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-cvt.ll | 248 ;CHECK: fcvtps w0, s0
250 %tmp3 = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float %A)
256 ;CHECK: fcvtps x0, s0
258 %tmp3 = call i64 @llvm.aarch64.neon.fcvtps.i64.f32(float %A)
264 ;CHECK: fcvtps w0, d0
266 %tmp3 = call i32 @llvm.aarch64.neon.fcvtps.i32.f64(double %A)
272 ;CHECK: fcvtps x0, d0
274 %tmp3 = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double %A)
278 declare i32 @llvm.aarch64.neon.fcvtps.i32.f32(float) nounwind readnone
279 declare i64 @llvm.aarch64.neon.fcvtps.i64.f32(float) nounwind readnone
[all …]
|
| D | fp16_intrinsic_scalar_1op.ll | 5 declare i64 @llvm.aarch64.neon.fcvtps.i64.f16(half)
6 declare i32 @llvm.aarch64.neon.fcvtps.i32.f16(half)
257 ; CHECK: fcvtps w0, h0
260 %fcvt = tail call i32 @llvm.aarch64.neon.fcvtps.i32.f16(half %a)
267 ; CHECK: fcvtps x0, h0
270 %vcvtph_s64_f16 = tail call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)
|
| D | round-conv.ll | 84 ; CHECK: fcvtps w0, s0
94 ; CHECK: fcvtps x0, s0
104 ; CHECK: fcvtps w0, d0
114 ; CHECK: fcvtps x0, d0
|
| D | arm64-vcvt.ll | 130 ;CHECK: fcvtps.2s v0, v0
132 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float> %A)
139 ;CHECK: fcvtps.4s v0, v0
141 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtps.v4i32.v4f32(<4 x float> %A)
148 ;CHECK: fcvtps.2d v0, v0
150 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtps.v2i64.v2f64(<2 x double> %A)
154 declare <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float>) nounwind readnone
155 declare <4 x i32> @llvm.aarch64.neon.fcvtps.v4i32.v4f32(<4 x float>) nounwind readnone
156 declare <2 x i64> @llvm.aarch64.neon.fcvtps.v2i64.v2f64(<2 x double>) nounwind readnone
|
| /external/capstone/suite/MC/AArch64/ |
| D | neon-scalar-cvt.s.cs | 27 0xb6,0xa9,0xa1,0x5e = fcvtps s22, s13
28 0xd5,0xa9,0xe1,0x5e = fcvtps d21, d14
|
| D | neon-simd-misc.s.cs | 171 0x06,0xa9,0xa1,0x4e = fcvtps v6.4s, v8.4s
172 0x06,0xa9,0xe1,0x4e = fcvtps v6.2d, v8.2d
173 0x04,0xa8,0xa1,0x0e = fcvtps v4.2s, v0.2s
|
| D | basic-a64-instructions.s.cs | 809 0x3f,0x01,0x28,0x1e = fcvtps wzr, s9
810 0x8c,0x02,0x28,0x9e = fcvtps x12, s20
833 0x3f,0x01,0x68,0x1e = fcvtps wzr, d9
834 0x8c,0x02,0x68,0x9e = fcvtps x12, d20
|
| /external/vixl/test/aarch64/ |
| D | test-cpu-features-aarch64.cc | 573 TEST_FP(fcvtps_0, fcvtps(w0, d1))
574 TEST_FP(fcvtps_1, fcvtps(w0, s1))
575 TEST_FP(fcvtps_2, fcvtps(x0, d1))
576 TEST_FP(fcvtps_3, fcvtps(x0, s1))
3164 TEST_FP_NEON(fcvtps_0, fcvtps(v0.V2S(), v1.V2S()))
3165 TEST_FP_NEON(fcvtps_1, fcvtps(v0.V4S(), v1.V4S()))
3166 TEST_FP_NEON(fcvtps_2, fcvtps(v0.V2D(), v1.V2D()))
3167 TEST_FP_NEON(fcvtps_3, fcvtps(s0, s1))
3168 TEST_FP_NEON(fcvtps_4, fcvtps(d0, d1))
3404 TEST_FP_FPHALF(fcvtps_0, fcvtps(w0, h1))
[all …]
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 405 0x~~~~~~~~~~~~~~~~ 5ee1aacb fcvtps d11, d22
406 0x~~~~~~~~~~~~~~~~ 5ea1aa9d fcvtps s29, s20
407 0x~~~~~~~~~~~~~~~~ 1e68032f fcvtps w15, d25
408 0x~~~~~~~~~~~~~~~~ 1e2800f0 fcvtps w16, s7
409 0x~~~~~~~~~~~~~~~~ 9e68028d fcvtps x13, d20
410 0x~~~~~~~~~~~~~~~~ 9e2802e3 fcvtps x3, s23
2237 0x~~~~~~~~~~~~~~~~ 4ee1a8b7 fcvtps v23.2d, v5.2d
2238 0x~~~~~~~~~~~~~~~~ 0ea1a9f8 fcvtps v24.2s, v15.2s
2239 0x~~~~~~~~~~~~~~~~ 4ea1aa65 fcvtps v5.4s, v19.4s
|