Home
last modified time | relevance | path

Searched refs:fmaxnmp (Results 1 – 25 of 50) sorted by relevance

12

/external/llvm/test/MC/AArch64/
Dneon-max-min-pairwise.s100 fmaxnmp v0.4h, v1.4h, v2.4h
101 fmaxnmp v31.8h, v15.8h, v16.8h
102 fmaxnmp v0.2s, v1.2s, v2.2s
103 fmaxnmp v31.4s, v15.4s, v16.4s
104 fmaxnmp v7.2d, v8.2d, v25.2d
Dfullfp16-neon-neg.s184 fmaxnmp v0.4h, v1.4h, v2.4h
186 fmaxnmp v31.8h, v15.8h, v16.8h
Dneon-diagnostics.s1188 fmaxnmp v0.2s, v1.2s, v2.2d
1189 fmaxnmp v0.4h, v1.8h, v2.4h
2917 fmaxnmp s0, v1.8b
2918 fmaxnmp d31, v2.16b
2919 fmaxnmp v1.2s, v2.2s
Darm64-advsimd.s317 fmaxnmp.2s v0, v0, v0
387 ; CHECK: fmaxnmp.2s v0, v0, v0 ; encoding: [0x00,0xc4,0x20,0x2e]
452 fmaxnmp.4h v0, v0, v0
477 ; CHECK: fmaxnmp.4h v0, v0, v0 ; encoding: [0x00,0x04,0x40,0x2e]
502 fmaxnmp.8h v0, v0, v0
527 ; CHECK: fmaxnmp.8h v0, v0, v0 ; encoding: [0x00,0x04,0x40,0x6e]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-max-min-pairwise.s100 fmaxnmp v0.4h, v1.4h, v2.4h
101 fmaxnmp v31.8h, v15.8h, v16.8h
102 fmaxnmp v0.2s, v1.2s, v2.2s
103 fmaxnmp v31.4s, v15.4s, v16.4s
104 fmaxnmp v7.2d, v8.2d, v25.2d
Dfullfp16-neon-neg.s184 fmaxnmp v0.4h, v1.4h, v2.4h
186 fmaxnmp v31.8h, v15.8h, v16.8h
Dneon-diagnostics.s1193 fmaxnmp v0.2s, v1.2s, v2.2d
1194 fmaxnmp v0.4h, v1.8h, v2.4h
2857 fmaxnmp s0, v1.8b
2858 fmaxnmp d31, v2.16b
2859 fmaxnmp v1.2s, v2.2s
Darm64-advsimd.s317 fmaxnmp.2s v0, v0, v0
387 ; CHECK: fmaxnmp.2s v0, v0, v0 ; encoding: [0x00,0xc4,0x20,0x2e]
452 fmaxnmp.4h v0, v0, v0
477 ; CHECK: fmaxnmp.4h v0, v0, v0 ; encoding: [0x00,0x04,0x40,0x2e]
502 fmaxnmp.8h v0, v0, v0
527 ; CHECK: fmaxnmp.8h v0, v0, v0 ; encoding: [0x00,0x04,0x40,0x6e]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dfp16_intrinsic_vector_2op.ll7 declare <4 x half> @llvm.aarch64.neon.fmaxnmp.v4f16(<4 x half>, <4 x half>)
8 declare <8 x half> @llvm.aarch64.neon.fmaxnmp.v8f16(<8 x half>, <8 x half>)
70 ; CHECK: fmaxnmp v0.4h, v0.4h, v1.4h
73 %vpmaxnm2.i = tail call <4 x half> @llvm.aarch64.neon.fmaxnmp.v4f16(<4 x half> %a, <4 x half> %b)
79 ; CHECK: fmaxnmp v0.8h, v0.8h, v1.8h
82 %vpmaxnm2.i = tail call <8 x half> @llvm.aarch64.neon.fmaxnmp.v8f16(<8 x half> %a, <8 x half> %b)
Darm64-fminv.ll80 ; CHECK: fmaxnmp s0, v0.2s
94 ; CHECK: fmaxnmp d0, v0.2d
Darm64-vmax.ll652 ;CHECK: fmaxnmp.2s
655 %tmp3 = call <2 x float> @llvm.aarch64.neon.fmaxnmp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
661 ;CHECK: fmaxnmp.4s
664 %tmp3 = call <4 x float> @llvm.aarch64.neon.fmaxnmp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
670 ;CHECK: fmaxnmp.2d
673 %tmp3 = call <2 x double> @llvm.aarch64.neon.fmaxnmp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
677 declare <2 x float> @llvm.aarch64.neon.fmaxnmp.v2f32(<2 x float>, <2 x float>) nounwind readnone
678 declare <4 x float> @llvm.aarch64.neon.fmaxnmp.v4f32(<4 x float>, <4 x float>) nounwind readnone
679 declare <2 x double> @llvm.aarch64.neon.fmaxnmp.v2f64(<2 x double>, <2 x double>) nounwind readnone
Darm64-vminmaxnm.ll70 ; CHECK: fmaxnmp.2d d0, v0
/external/capstone/suite/MC/AArch64/
Dneon-max-min-pairwise.s.cs32 0x20,0xc4,0x22,0x2e = fmaxnmp v0.2s, v1.2s, v2.2s
33 0xff,0xc5,0x30,0x6e = fmaxnmp v31.4s, v15.4s, v16.4s
34 0x07,0xc5,0x79,0x6e = fmaxnmp v7.2d, v8.2d, v25.2d
/external/llvm/test/CodeGen/AArch64/
Darm64-fminv.ll80 ; CHECK: fmaxnmp s0, v0.2s
94 ; CHECK: fmaxnmp d0, v0.2d
Darm64-vmax.ll652 ;CHECK: fmaxnmp.2s
655 %tmp3 = call <2 x float> @llvm.aarch64.neon.fmaxnmp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
661 ;CHECK: fmaxnmp.4s
664 %tmp3 = call <4 x float> @llvm.aarch64.neon.fmaxnmp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
670 ;CHECK: fmaxnmp.2d
673 %tmp3 = call <2 x double> @llvm.aarch64.neon.fmaxnmp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
677 declare <2 x float> @llvm.aarch64.neon.fmaxnmp.v2f32(<2 x float>, <2 x float>) nounwind readnone
678 declare <4 x float> @llvm.aarch64.neon.fmaxnmp.v4f32(<4 x float>, <4 x float>) nounwind readnone
679 declare <2 x double> @llvm.aarch64.neon.fmaxnmp.v2f64(<2 x double>, <2 x double>) nounwind readnone
Darm64-vminmaxnm.ll70 ; CHECK: fmaxnmp.2d d0, v0
/external/v8/src/arm64/
Dmacro-assembler-arm64.h299 V(fmaxnmp, Fmaxnmp) \
406 V(fmaxnmp, Fmaxnmp) \
Dassembler-arm64.h2351 void fmaxnmp(const VRegister& vd, const VRegister& vn);
2406 void fmaxnmp(const VRegister& vd, const VRegister& vn, const VRegister& vm);
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour2266 0x~~~~~~~~~~~~~~~~ 7e70ca66 fmaxnmp d6, v19.2d
2267 0x~~~~~~~~~~~~~~~~ 7e30cb5b fmaxnmp s27, v26.2s
2268 0x~~~~~~~~~~~~~~~~ 6e77c588 fmaxnmp v8.2d, v12.2d, v23.2d
2269 0x~~~~~~~~~~~~~~~~ 2e36c72d fmaxnmp v13.2s, v25.2s, v22.2s
2270 0x~~~~~~~~~~~~~~~~ 6e31c56f fmaxnmp v15.4s, v11.4s, v17.4s
Dlog-disasm2266 0x~~~~~~~~~~~~~~~~ 7e70ca66 fmaxnmp d6, v19.2d
2267 0x~~~~~~~~~~~~~~~~ 7e30cb5b fmaxnmp s27, v26.2s
2268 0x~~~~~~~~~~~~~~~~ 6e77c588 fmaxnmp v8.2d, v12.2d, v23.2d
2269 0x~~~~~~~~~~~~~~~~ 2e36c72d fmaxnmp v13.2s, v25.2s, v22.2s
2270 0x~~~~~~~~~~~~~~~~ 6e31c56f fmaxnmp v15.4s, v11.4s, v17.4s
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc2617 __ fmaxnmp(d6, v19.V2D()); in GenerateTestSequenceNEONFP() local
2618 __ fmaxnmp(s27, v26.V2S()); in GenerateTestSequenceNEONFP() local
2619 __ fmaxnmp(v8.V2D(), v12.V2D(), v23.V2D()); in GenerateTestSequenceNEONFP() local
2620 __ fmaxnmp(v13.V2S(), v25.V2S(), v22.V2S()); in GenerateTestSequenceNEONFP() local
2621 __ fmaxnmp(v15.V4S(), v11.V4S(), v17.V4S()); in GenerateTestSequenceNEONFP() local
Dtest-cpu-features-aarch64.cc3200 TEST_FP_NEON(fmaxnmp_0, fmaxnmp(s0, v1.V2S()))
3201 TEST_FP_NEON(fmaxnmp_1, fmaxnmp(d0, v1.V2D()))
3202 TEST_FP_NEON(fmaxnmp_2, fmaxnmp(v0.V2S(), v1.V2S(), v2.V2S()))
3203 TEST_FP_NEON(fmaxnmp_3, fmaxnmp(v0.V4S(), v1.V4S(), v2.V4S()))
3204 TEST_FP_NEON(fmaxnmp_4, fmaxnmp(v0.V2D(), v1.V2D(), v2.V2D()))
3573 TEST_FP_NEON_NEONHALF(fmaxnmp_0, fmaxnmp(v0.V4H(), v1.V4H(), v2.V4H()))
3574 TEST_FP_NEON_NEONHALF(fmaxnmp_1, fmaxnmp(v0.V8H(), v1.V8H(), v2.V8H()))
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt619 # CHECK: fmaxnmp v9.2s, v8.2s, v5.2s
620 # CHECK: fmaxnmp v9.4s, v8.4s, v5.4s
621 # CHECK: fmaxnmp v11.2d, v10.2d, v7.2d
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt619 # CHECK: fmaxnmp v9.2s, v8.2s, v5.2s
620 # CHECK: fmaxnmp v9.4s, v8.4s, v5.4s
621 # CHECK: fmaxnmp v11.2d, v10.2d, v7.2d
/external/vixl/src/aarch64/
Dassembler-aarch64.h3466 void fmaxnmp(const VRegister& vd, const VRegister& vn, const VRegister& vm);
3469 void fmaxnmp(const VRegister& vd, const VRegister& vn);

12