/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIMachineFunctionInfo.cpp | 189 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addPrivateSegmentBuffer() 196 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr() 203 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr() 211 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addKernargSegmentPtr() 218 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID() 225 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addFlatScratchInit() 232 ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addImplicitBufferPtr()
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D | R600ControlFlowFinalizer.cpp | 311 DstMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause() 320 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIMachineFunctionInfo.cpp | 150 PrivateSegmentBufferUserSGPR = TRI.getMatchingSuperReg( in addPrivateSegmentBuffer() 157 DispatchPtrUserSGPR = TRI.getMatchingSuperReg( in addDispatchPtr() 164 QueuePtrUserSGPR = TRI.getMatchingSuperReg( in addQueuePtr() 171 KernargSegmentPtrUserSGPR = TRI.getMatchingSuperReg( in addKernargSegmentPtr() 178 FlatScratchInitUserSGPR = TRI.getMatchingSuperReg( in addFlatScratchInit()
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D | R600ControlFlowFinalizer.cpp | 295 DstMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause() 304 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | CalcSpillWeights.cpp | 79 return tri.getMatchingSuperReg(hreg, sub, rc); in copyHint() 88 return tri.getMatchingSuperReg(CopiedPReg, sub, rc); in copyHint()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.cpp | 1908 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg() 1910 unsigned SrcRegX = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_32, in copyPhysReg() 1933 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg() 1935 unsigned SrcRegX = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_32, in copyPhysReg() 2057 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, in copyPhysReg() 2059 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::dsub, in copyPhysReg() 2074 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg() 2076 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::ssub, in copyPhysReg() 2091 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg() 2093 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg() [all …]
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/external/llvm/lib/MC/ |
D | MCRegisterInfo.cpp | 18 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function in MCRegisterInfo
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/MC/ |
D | MCRegisterInfo.cpp | 23 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function in MCRegisterInfo
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/external/llvm/include/llvm/Target/ |
D | TargetRegisterInfo.h | 499 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function 501 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC); in getMatchingSuperReg()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.cpp | 2462 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg() 2464 unsigned SrcRegX = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_32, in copyPhysReg() 2488 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg() 2490 unsigned SrcRegX = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_32, in copyPhysReg() 2613 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, in copyPhysReg() 2615 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::dsub, in copyPhysReg() 2630 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg() 2632 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::ssub, in copyPhysReg() 2647 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg() 2649 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg() [all …]
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | CalcSpillWeights.cpp | 86 return tri.getMatchingSuperReg(hreg, sub, rc); in copyHint()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | TargetRegisterInfo.h | 534 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function 536 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC); in getMatchingSuperReg()
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/external/llvm/lib/CodeGen/ |
D | CalcSpillWeights.cpp | 73 return tri.getMatchingSuperReg(hreg, sub, rc); in copyHint()
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/external/llvm/lib/Target/ARM/ |
D | ARMFrameLowering.cpp | 1133 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1151 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1163 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1251 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores() 1267 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores() 1278 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
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D | A15SDOptimizer.cpp | 148 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZShortenInst.cpp | 88 TRI->getMatchingSuperReg(Reg, thisSubRegIdx, &SystemZ::GR64BitRegClass); in shortenIIF()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMFrameLowering.cpp | 1232 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1251 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1266 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1364 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores() 1382 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores() 1395 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
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D | A15SDOptimizer.cpp | 146 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZShortenInst.cpp | 88 TRI->getMatchingSuperReg(Reg, thisSubRegIdx, &SystemZ::GR64BitRegClass); in shortenIIF()
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D | SystemZInstrInfo.cpp | 882 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_h64), in copyPhysReg() 885 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_l64), in copyPhysReg() 896 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_h64), in copyPhysReg() 899 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_l64), in copyPhysReg()
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/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
D | TargetRegisterInfo.h | 382 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function
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/external/llvm/include/llvm/MC/ |
D | MCRegisterInfo.h | 347 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
D | MCRegisterInfo.h | 357 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 850 TRI->getMatchingSuperReg(DestReg, PPC::sub_64, &PPC::VSRCRegClass); in copyPhysReg() 859 TRI->getMatchingSuperReg(DestReg, PPC::sub_128, &PPC::VSRCRegClass); in copyPhysReg() 868 TRI->getMatchingSuperReg(SrcReg, PPC::sub_64, &PPC::VSRCRegClass); in copyPhysReg() 877 TRI->getMatchingSuperReg(SrcReg, PPC::sub_128, &PPC::VSRCRegClass); in copyPhysReg()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/AsmParser/ |
D | AVRAsmParser.cpp | 77 return MRI->getMatchingSuperReg(Reg, From, Class); in toDREG()
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