| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | LiveRegUnits.cpp | 56 removeRegsNotPreserved(O->getRegMask()); in stepBackward()
81 addRegsInMask(O->getRegMask()); in accumulate()
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| D | DeadMachineInstructionElim.cpp | 153 LivePhysRegs.clearBitsNotInMask(MO.getRegMask()); in runOnMachineFunction()
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| D | MachineOperand.cpp | 295 const uint32_t *RegMask = getRegMask(); in isIdenticalTo()
296 const uint32_t *OtherRegMask = Other.getRegMask(); in isIdenticalTo()
359 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getRegMask()); in hash_value()
854 if (getRegMask()[MaskWord] & (1 << MaskBit)) { in print()
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| D | LivePhysRegs.cpp | 114 MachineOperand::clobbersPhysReg(Reg.second->getRegMask(), Reg.first)) in stepForward()
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| D | MIRPrinter.cpp | 782 auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask()); in print()
786 printCustomRegMask(Op.getRegMask(), OS, TRI); in print()
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| D | VirtRegMap.cpp | 515 MRI->addPhysRegsUsedFromRegMask(MO.getRegMask()); in rewrite()
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| D | RegisterScavenging.cpp | 330 Candidates.clearBitsNotInMask(MO.getRegMask()); in findSurvivorReg()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | LiveRegUnits.h | 54 ModifiedRegUnits.addRegsInMask(O->getRegMask()); in accumulateUsedDefed()
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| D | MachineOperand.h | 609 return clobbersPhysReg(getRegMask(), PhysReg); in clobbersPhysReg()
614 const uint32_t *getRegMask() const { in getRegMask() function
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| /external/llvm/lib/CodeGen/ |
| D | DeadMachineInstructionElim.cpp | 157 LivePhysRegs.clearBitsNotInMask(MO.getRegMask()); in runOnMachineFunction()
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| D | MachineInstr.cpp | 252 return getRegMask() == Other.getRegMask(); in isIdenticalTo()
296 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getRegMask()); in hash_value()
430 if (getRegMask()[MaskWord] & (1 << MaskBit)) { in print()
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| D | VirtRegMap.cpp | 394 MRI->addPhysRegsUsedFromRegMask(MO.getRegMask()); in rewrite()
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| D | RegisterScavenging.cpp | 299 Candidates.clearBitsNotInMask(MO.getRegMask()); in findSurvivorReg()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineOperand.h | 483 return clobbersPhysReg(getRegMask(), PhysReg); in clobbersPhysReg()
488 const uint32_t *getRegMask() const { in getRegMask() function
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| D | DbgValueHistoryCalculator.cpp | 172 Regs.setBitsNotInMask(MO.getRegMask()); in collectChangingRegs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | RDFDeadCode.cpp | 70 const uint32_t *BM = Op.getRegMask(); in isLiveInstr()
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| D | RDFRegisters.cpp | 82 RegMasks.insert(Op.getRegMask()); in PhysicalRegisterInfo()
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| D | HexagonBlockRanges.cpp | 354 const uint32_t *BM = Op.getRegMask(); in computeInitialLiveRanges()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/AsmPrinter/ |
| D | DbgValueHistoryCalculator.cpp | 183 Regs.setBitsNotInMask(MO.getRegMask()); in collectChangingRegs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/CodeGen/ |
| D | MachineOperandTest.cpp | 55 ASSERT_TRUE(MO.getRegMask() == &Dummy); in TEST()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64CollectLOH.cpp | 463 const uint32_t *RegMask = MO.getRegMask(); in handleNormalInst()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZElimCompare.cpp | 424 RegMask = MBBI->getOperand(2).getRegMask(); in fuseCompareOperations()
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| /external/llvm/lib/CodeGen/MIRParser/ |
| D | MIParser.cpp | 217 const uint32_t *getRegMask(StringRef Identifier);
1519 if (const auto *RegMask = getRegMask(Token.stringValue())) { in parseMachineOperand()
1901 const uint32_t *MIParser::getRegMask(StringRef Identifier) { in getRegMask() function in MIParser
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64A57FPLoadBalancing.cpp | 516 AvailableRegs.clearBitsNotInMask(J.getRegMask()); in scavengeRegister()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZElimCompare.cpp | 545 RegMask = MBBI->getOperand(2).getRegMask(); in fuseCompareOperations()
|