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Searched refs:hclkdiv_ctrl (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/cpu/arm926ejs/lpc32xx/
Dclk.c73 val = readl(&clk->hclkdiv_ctrl) & CLK_HCLK_ARM_PLL_DIV_MASK; in get_hclk_clk_div()
87 val = readl(&clk->hclkdiv_ctrl) & CLK_HCLK_PERIPH_DIV_MASK; in get_periph_clk_div()
111 switch (readl(&clk->hclkdiv_ctrl) & CLK_HCLK_DDRAM_MASK) { in get_sdram_clk_rate()
121 switch (readl(&clk->hclkdiv_ctrl) & CLK_HCLK_ARM_PLL_DIV_MASK) { in get_sdram_clk_rate()
/external/u-boot/arch/arm/include/asm/arch-lpc32xx/
Dclk.h31 u32 hclkdiv_ctrl; /* HCLK Divider Control Register */ member