/external/libvpx/libvpx/vp9/encoder/mips/msa/ |
D | vp9_fdct8x8_msa.c | 18 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; in vp9_fht8x8_msa() local 20 LD_SH8(input, stride, in0, in1, in2, in3, in4, in5, in6, in7); in vp9_fht8x8_msa() 22 SLLI_4V(in4, in5, in6, in7, 2); in vp9_fht8x8_msa() 26 VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in vp9_fht8x8_msa() 27 in5, in6, in7); in vp9_fht8x8_msa() 28 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in vp9_fht8x8_msa() 29 in3, in4, in5, in6, in7); in vp9_fht8x8_msa() 30 VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in vp9_fht8x8_msa() 31 in5, in6, in7); in vp9_fht8x8_msa() 34 VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in vp9_fht8x8_msa() [all …]
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D | vp9_fdct_msa.h | 18 #define VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, \ argument 35 ILVRL_H2_SH(in0, in7, vec1_m, vec0_m); \ 38 cnst2_m, cnst3_m, in7, in0, in4, in3); \ 52 BUTTERFLY_4(in7, in0, in2, in5, s1_m, s0_m, in2, in5); \
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D | vp9_fdct16x16_msa.c | 368 v8i16 in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in11; in postproc_fdct16x8_1d_row() local 371 LD_SH8(temp, 16, in0, in1, in2, in3, in4, in5, in6, in7); in postproc_fdct16x8_1d_row() 374 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in postproc_fdct16x8_1d_row() 375 in4, in5, in6, in7); in postproc_fdct16x8_1d_row() 381 FDCT_POSTPROC_2V_NEG_H(in6, in7); in postproc_fdct16x8_1d_row() 386 BUTTERFLY_16(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in11, in postproc_fdct16x8_1d_row() 396 in4, in5, in6, in7); in postproc_fdct16x8_1d_row() 400 TRANSPOSE8x8_SH_SH(tmp4, in4, tmp5, in5, tmp6, in6, tmp7, in7, tmp4, in4, in postproc_fdct16x8_1d_row() 401 tmp5, in5, tmp6, in6, tmp7, in7); in postproc_fdct16x8_1d_row() 403 ST_SH8(tmp4, in4, tmp5, in5, tmp6, in6, tmp7, in7, out, 16); in postproc_fdct16x8_1d_row()
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/external/libvpx/libvpx/vp9/common/mips/msa/ |
D | vp9_idct8x8_msa.c | 18 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; in vp9_iht8x8_64_add_msa() local 21 LD_SH8(input, 8, in0, in1, in2, in3, in4, in5, in6, in7); in vp9_iht8x8_64_add_msa() 23 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in vp9_iht8x8_64_add_msa() 24 in4, in5, in6, in7); in vp9_iht8x8_64_add_msa() 29 VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in vp9_iht8x8_64_add_msa() 30 in4, in5, in6, in7); in vp9_iht8x8_64_add_msa() 32 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in vp9_iht8x8_64_add_msa() 33 in3, in4, in5, in6, in7); in vp9_iht8x8_64_add_msa() 34 VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in vp9_iht8x8_64_add_msa() 35 in4, in5, in6, in7); in vp9_iht8x8_64_add_msa() [all …]
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/external/libvpx/libvpx/vpx_dsp/mips/ |
D | idct8x8_msa.c | 15 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; in vpx_idct8x8_64_add_msa() local 18 LD_SH8(input, 8, in0, in1, in2, in3, in4, in5, in6, in7); in vpx_idct8x8_64_add_msa() 21 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in vpx_idct8x8_64_add_msa() 22 in4, in5, in6, in7); in vpx_idct8x8_64_add_msa() 24 VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in vpx_idct8x8_64_add_msa() 25 in4, in5, in6, in7); in vpx_idct8x8_64_add_msa() 27 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in vpx_idct8x8_64_add_msa() 28 in4, in5, in6, in7); in vpx_idct8x8_64_add_msa() 30 VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in vpx_idct8x8_64_add_msa() 31 in4, in5, in6, in7); in vpx_idct8x8_64_add_msa() [all …]
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D | fwd_txfm_msa.c | 15 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; in vpx_fdct8x8_1_msa() local 18 LD_SH8(input, stride, in0, in1, in2, in3, in4, in5, in6, in7); in vpx_fdct8x8_1_msa() 19 ADD4(in0, in1, in2, in3, in4, in5, in6, in7, in0, in2, in4, in6); in vpx_fdct8x8_1_msa() 31 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; in fdct8x16_1d_column() local 44 LD_SH16(input, src_stride, in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in fdct8x16_1d_column() 47 SLLI_4V(in4, in5, in6, in7, 2); in fdct8x16_1d_column() 51 ADD4(in4, in11, in5, in10, in6, in9, in7, in8, tmp4, tmp5, tmp6, tmp7); in fdct8x16_1d_column() 56 SUB4(in4, in11, in5, in10, in6, in9, in7, in8, in11, in10, in9, in8); in fdct8x16_1d_column() 150 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; in fdct16x8_1d_row() local 153 LD_SH8(input, 16, in0, in1, in2, in3, in4, in5, in6, in7); in fdct16x8_1d_row() [all …]
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D | macros_msa.h | 331 #define ST_V8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, pdst, stride) \ argument 334 ST_V4(RTYPE, in4, in5, in6, in7, (pdst) + 4 * stride, stride); \ 488 #define AVER_UB4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 492 AVER_UB2(RTYPE, in4, in5, in6, in7, out2, out3) \ 1005 #define ILVL_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 1009 ILVL_B2(RTYPE, in4, in5, in6, in7, out2, out3); \ 1062 #define ILVR_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 1066 ILVR_B2(RTYPE, in4, in5, in6, in7, out2, out3); \ 1073 #define ILVR_B8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, \ argument 1077 ILVR_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, \ [all …]
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D | fwd_dct32x32_msa.c | 16 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; in fdct8x32_1d_column_load_butterfly() local 23 LD_SH4(input + (28 * src_stride), src_stride, in4, in5, in6, in7); in fdct8x32_1d_column_load_butterfly() 27 SLLI_4V(in4, in5, in6, in7, 2); in fdct8x32_1d_column_load_butterfly() 30 BUTTERFLY_8(in0, in1, in2, in3, in4, in5, in6, in7, step0, step1, step2, in fdct8x32_1d_column_load_butterfly() 31 step3, in4, in5, in6, in7); in fdct8x32_1d_column_load_butterfly() 35 ST_SH4(in4, in5, in6, in7, temp_buff + (28 * 8), 8); in fdct8x32_1d_column_load_butterfly() 41 LD_SH4(input + (20 * src_stride), src_stride, in4, in5, in6, in7); in fdct8x32_1d_column_load_butterfly() 45 SLLI_4V(in4, in5, in6, in7, 2); in fdct8x32_1d_column_load_butterfly() 48 BUTTERFLY_8(in0, in1, in2, in3, in4, in5, in6, in7, step0, step1, step2, in fdct8x32_1d_column_load_butterfly() 49 step3, in4, in5, in6, in7); in fdct8x32_1d_column_load_butterfly() [all …]
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D | inv_txfm_msa.h | 18 #define VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, \ argument 35 ILVRL_H2_SH(in0, in7, vec1_m, vec0_m); \ 38 cnst2_m, cnst3_m, in7, in0, in4, in3); \ 52 BUTTERFLY_4(in7, in0, in2, in5, s1_m, s0_m, in2, in5); \ 214 #define VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 227 VP9_MADD(in1, in7, in3, in5, k0_m, k1_m, k2_m, k3_m, in1, in7, in3, in5); \ 228 SUB2(in1, in3, in7, in5, res0_m, res1_m); \ 238 tp7_m = in7 + in5; \ 247 #define VP9_IADST8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 286 ILVRL_H2_SH(in7, in6, in_s1, in_s0); \ [all …]
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D | fwd_txfm_msa.h | 46 #define SRLI_AVE_S_4V_H(in0, in1, in2, in3, in4, in5, in6, in7) \ argument 51 SRLI_H4_SH(in4, in5, in6, in7, vec4_m, vec5_m, vec6_m, vec7_m, 15); \ 54 AVE_SH4_SH(vec4_m, in4, vec5_m, in5, vec6_m, in6, vec7_m, in7, in4, in5, \ 55 in6, in7); \ 58 #define VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, \ argument 67 BUTTERFLY_8(in0, in1, in2, in3, in4, in5, in6, in7, s0_m, s1_m, s2_m, \ 118 #define FDCT8x16_EVEN(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 127 BUTTERFLY_8(in0, in1, in2, in3, in4, in5, in6, in7, s0_m, s1_m, s2_m, \
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D | txfm_macros_msa.h | 40 #define DOT_ADD_SUB_SRARI_PCK(in0, in1, in2, in3, in4, in5, in6, in7, dst0, \ argument 48 DOTP_SH4_SW(in2, in3, in2, in3, in6, in6, in7, in7, tp5_m, tp6_m, tp7_m, \
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D | deblock_msa.c | 18 in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, out3, out4, \ argument 24 ILVR_B4_SH(in1, in0, in3, in2, in5, in4, in7, in6, temp0, temp1, temp2, \ 30 ILVL_B4_SH(in1, in0, in3, in2, in5, in4, in7, in6, temp0, temp1, temp2, \ 73 #define TRANSPOSE12x16_B(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, \ argument 81 ILVR_B2_SH(in5, in4, in7, in6, temp0, temp1); \ 96 ILVL_B2_SH(in5, in4, in7, in6, temp0, temp1); \ 99 in7 = (v16u8)__msa_ilvl_d((v2i64)temp7, (v2i64)temp3); \ 112 #define VPX_TRANSPOSE12x8_UB_UB(in0, in1, in2, in3, in4, in5, in6, in7, in8, \ argument 120 ILVR_B2_SH(in5, in4, in7, in6, temp0, temp1); \ 126 ILVL_B2_SH(in5, in4, in7, in6, temp6, temp7); \ [all …]
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/external/tensorflow/tensorflow/core/kernels/ |
D | aggregate_ops_cpu.h | 94 typename TTypes<T>::ConstFlat in7) { 96 in7); 107 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) { 109 in7, in8); 120 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) { 122 in7, in8); 133 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8, 136 in7, in8, in9); 202 typename TTypes<T>::ConstFlat in7) { 204 in7); [all …]
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D | aggregate_ops_gpu.cu.cc | 96 typename TTypes<T>::ConstFlat in7) { in operator ()() 98 in7); in operator ()() 109 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) { in operator ()() 111 in7, in8); in operator ()() 122 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) { in operator ()() 124 in7, in8); in operator ()() 135 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8, in operator ()() 138 in7, in8, in9); in operator ()()
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D | aggregate_ops.h | 136 typename TTypes<T>::ConstFlat in7); 148 typename TTypes<T>::ConstFlat in7) { in Compute() 149 out.device(d) = in1 + in2 + in3 + in4 + in5 + in6 + in7; in Compute() 160 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8); 170 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) { in Compute() 171 out.device(d) = in1 + in2 + in3 + in4 + in5 + in6 + in7 + in8; in Compute() 184 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8); 194 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) { in Compute() 195 out.device(d) += in1 + in2 + in3 + in4 + in5 + in6 + in7 + in8; in Compute() 206 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8, [all …]
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/external/libaom/libaom/aom_dsp/x86/ |
D | fwd_txfm_impl_sse2.h | 59 __m128i in7 = _mm_load_si128((const __m128i *)(input + 7 * stride)); in FDCT8x8_2D() local 68 in7 = _mm_slli_epi16(in7, 2); in FDCT8x8_2D() 78 const __m128i q0 = ADD_EPI16(in0, in7); in FDCT8x8_2D() 85 const __m128i q7 = SUB_EPI16(in0, in7); in FDCT8x8_2D() 291 in7 = _mm_unpackhi_epi64(tr1_3, tr1_7); in FDCT8x8_2D() 314 const __m128i sign_in7 = _mm_srai_epi16(in7, 15); in FDCT8x8_2D() 322 in7 = _mm_sub_epi16(in7, sign_in7); in FDCT8x8_2D() 330 in7 = _mm_srai_epi16(in7, 1); in FDCT8x8_2D() 339 store_output(&in7, (output + 7 * 8)); in FDCT8x8_2D()
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/external/libaom/libaom/aom_dsp/mips/ |
D | macros_msa.h | 423 #define ST_B8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, pdst, stride) \ argument 426 ST_B4(RTYPE, in4, in5, in6, in7, (pdst) + 4 * stride, stride); \ 449 #define ST_H8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, pdst, stride) \ argument 452 ST_H4(RTYPE, in4, in5, in6, in7, (pdst) + 4 * stride, stride); \ 616 #define AVER_UB4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 620 AVER_UB2(RTYPE, in4, in5, in6, in7, out2, out3) \ 1116 #define ILVL_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 1120 ILVL_B2(RTYPE, in4, in5, in6, in7, out2, out3); \ 1173 #define ILVR_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 1177 ILVR_B2(RTYPE, in4, in5, in6, in7, out2, out3); \ [all …]
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/external/libvpx/libvpx/vp9/encoder/x86/ |
D | vp9_dct_ssse3.c | 53 __m128i in7 = _mm_load_si128((const __m128i *)(input + 7 * stride)); in vp9_fdct8x8_quant_ssse3() local 68 in7 = _mm_slli_epi16(in7, 2); in vp9_fdct8x8_quant_ssse3() 77 in[7] = &in7; in vp9_fdct8x8_quant_ssse3() 87 const __m128i q0 = _mm_add_epi16(in0, in7); in vp9_fdct8x8_quant_ssse3() 94 const __m128i q7 = _mm_sub_epi16(in0, in7); in vp9_fdct8x8_quant_ssse3() 243 in7 = _mm_unpackhi_epi64(tr1_3, tr1_7); in vp9_fdct8x8_quant_ssse3() 266 const __m128i sign_in7 = _mm_srai_epi16(in7, 15); in vp9_fdct8x8_quant_ssse3() 274 in7 = _mm_sub_epi16(in7, sign_in7); in vp9_fdct8x8_quant_ssse3() 282 in7 = _mm_srai_epi16(in7, 1); in vp9_fdct8x8_quant_ssse3()
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/external/libvpx/libvpx/vp8/common/mips/msa/ |
D | vp8_macros_msa.h | 360 #define ST_B8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, pdst, stride) \ argument 363 ST_B4(RTYPE, in4, in5, in6, in7, (pdst) + 4 * stride, stride); \ 953 #define ILVL_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 957 ILVL_B2(RTYPE, in4, in5, in6, in7, out2, out3); \ 1008 #define ILVR_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 1012 ILVR_B2(RTYPE, in4, in5, in6, in7, out2, out3); \ 1035 #define ILVR_H4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 1039 ILVR_H2(RTYPE, in4, in5, in6, in7, out2, out3); \ 1067 #define ILVR_D4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \ argument 1071 ILVR_D2(RTYPE, in4, in5, in6, in7, out2, out3); \ [all …]
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/external/boringssl/src/crypto/fipsmodule/aes/asm/ |
D | aesp8-ppc.pl | 672 my ($in0, $in1, $in2, $in3, $in4, $in5, $in6, $in7 )=map("v$_",(0..3,10..13)); 789 lvx_u $in7,$x70,$inp 795 le?vperm $in7,$in7,$in7,$inpperm 798 vxor $out7,$in7,$rndkey0 927 vmr $ivec,$in7 929 lvx_u $in7,$x70,$inp 939 le?vperm $in7,$in7,$in7,$inpperm 958 vxor $out7,$in7,$rndkey0 1073 vmr $ivec,$in7 1100 vmr $ivec,$in7 [all …]
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/external/webp/src/dsp/ |
D | msa_macro.h | 310 #define ST_B8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \ argument 313 ST_B4(RTYPE, in4, in5, in6, in7, pdst + 4 * stride, stride); \ 873 #define ILVR_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \ argument 876 ILVR_B2(RTYPE, in4, in5, in6, in7, out2, out3); \ 899 #define ILVR_H4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \ argument 902 ILVR_H2(RTYPE, in4, in5, in6, in7, out2, out3); \ 923 #define ILVR_D4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \ argument 926 ILVR_D2(RTYPE, in4, in5, in6, in7, out2, out3); \ 984 #define PCKEV_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \ argument 987 PCKEV_B2(RTYPE, in4, in5, in6, in7, out2, out3); \ [all …]
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/external/libvpx/libvpx/vpx_dsp/x86/ |
D | fwd_txfm_impl_sse2.h | 284 __m128i in7 = _mm_load_si128((const __m128i *)(input + 7 * stride)); in FDCT8x8_2D() local 293 in7 = _mm_slli_epi16(in7, 2); in FDCT8x8_2D() 303 const __m128i q0 = ADD_EPI16(in0, in7); in FDCT8x8_2D() 310 const __m128i q7 = SUB_EPI16(in0, in7); in FDCT8x8_2D() 516 in7 = _mm_unpackhi_epi64(tr1_3, tr1_7); in FDCT8x8_2D() 539 const __m128i sign_in7 = _mm_srai_epi16(in7, 15); in FDCT8x8_2D() 547 in7 = _mm_sub_epi16(in7, sign_in7); in FDCT8x8_2D() 555 in7 = _mm_srai_epi16(in7, 1); in FDCT8x8_2D() 564 store_output(&in7, (output + 7 * 8)); in FDCT8x8_2D()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Reassociate/ |
D | long-chains.ll | 4 define i8 @longchain(i8 %in1, i8 %in2, i8 %in3, i8 %in4, i8 %in5, i8 %in6, i8 %in7, i8 %in8, i8 %in… 12 %tmp8 = add i8 %tmp7, %in7
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/external/libvpx/libvpx/vpx_dsp/ppc/ |
D | inv_txfm_vsx.c | 234 #define TRANSPOSE8x8(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, \ argument 242 out6 = vec_mergeh(in6, in7); \ 243 out7 = vec_mergel(in6, in7); \ 251 in7 = (int16x8_t)vec_mergel((int32x4_t)out5, (int32x4_t)out7); \ 258 out6 = vec_perm(in3, in7, tr8_mask0); \ 259 out7 = vec_perm(in3, in7, tr8_mask1); 293 #define IDCT8(in0, in1, in2, in3, in4, in5, in6, in7) \ argument 300 STEP8_0(in1, in7, step4, step7, cospi28_v, cospi4_v); \ 309 in7 = vec_add(step6, step7); \ 318 step7 = in7; \ [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | amdhsa-trap-num-sgprs.ll | 15 i32 addrspace(1)* %out7, i32 %in7, 46 store i32 %in7, i32 addrspace(1)* %out7
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